Lines Matching refs:OS
65 void Enumeration(raw_ostream &OS, const char *ClassName, bool isBits);
66 unsigned FeatureKeyValues(raw_ostream &OS);
67 unsigned CPUKeyValues(raw_ostream &OS);
76 void EmitStageAndOperandCycleData(raw_ostream &OS,
79 void EmitItineraries(raw_ostream &OS,
82 void EmitProcessorProp(raw_ostream &OS, const Record *R, const char *Name,
85 raw_ostream &OS);
94 void EmitSchedClassTables(SchedClassTables &SchedTables, raw_ostream &OS);
95 void EmitProcessorModels(raw_ostream &OS);
96 void EmitProcessorLookup(raw_ostream &OS);
97 void EmitSchedModelHelpers(std::string ClassName, raw_ostream &OS);
98 void EmitSchedModel(raw_ostream &OS);
99 void ParseFeaturesFunction(raw_ostream &OS, unsigned NumFeatures,
114 void SubtargetEmitter::Enumeration(raw_ostream &OS, in Enumeration() argument
129 OS << "namespace " << Target << " {\n"; in Enumeration()
140 OS << " const uint64_t " << Def->getName() << " = 1ULL << " << i << ";\n"; in Enumeration()
144 OS << "enum {\n"; in Enumeration()
152 OS << " " << Def->getName(); in Enumeration()
155 if (isBits) OS << " = " << " 1ULL << " << i; in Enumeration()
158 if (++i < N) OS << ","; in Enumeration()
160 OS << "\n"; in Enumeration()
164 OS << "};\n"; in Enumeration()
167 OS << "}\n"; in Enumeration()
174 unsigned SubtargetEmitter::FeatureKeyValues(raw_ostream &OS) { in FeatureKeyValues() argument
185 OS << "// Sorted (by key) array of values for CPU features.\n" in FeatureKeyValues()
202 OS << " { " in FeatureKeyValues()
211 OS << "0ULL"; in FeatureKeyValues()
214 OS << Target << "::" << ImpliesList[j]->getName(); in FeatureKeyValues()
215 if (++j < M) OS << " | "; in FeatureKeyValues()
219 OS << " }"; in FeatureKeyValues()
223 if ((i + 1) < N) OS << ","; in FeatureKeyValues()
225 OS << "\n"; in FeatureKeyValues()
229 OS << "};\n"; in FeatureKeyValues()
238 unsigned SubtargetEmitter::CPUKeyValues(raw_ostream &OS) { in CPUKeyValues() argument
245 OS << "// Sorted (by key) array of values for CPU subtype.\n" in CPUKeyValues()
259 OS << " { " in CPUKeyValues()
264 OS << "0ULL"; in CPUKeyValues()
267 OS << Target << "::" << FeatureList[j]->getName(); in CPUKeyValues()
268 if (++j < M) OS << " | "; in CPUKeyValues()
273 OS << ", 0ULL }"; in CPUKeyValues()
276 if (++i < N) OS << ","; in CPUKeyValues()
278 OS << "\n"; in CPUKeyValues()
282 OS << "};\n"; in CPUKeyValues()
378 EmitStageAndOperandCycleData(raw_ostream &OS, in EmitStageAndOperandCycleData() argument
397 OS << "\n// Functional units for \"" << Name << "\"\n" in EmitStageAndOperandCycleData()
401 OS << " const unsigned " << FUs[j]->getName() in EmitStageAndOperandCycleData()
404 OS << "}\n"; in EmitStageAndOperandCycleData()
408 OS << "\n// Pipeline forwarding pathes for itineraries \"" << Name in EmitStageAndOperandCycleData()
411 OS << " const unsigned NoBypass = 0;\n"; in EmitStageAndOperandCycleData()
413 OS << " const unsigned " << BPs[j]->getName() in EmitStageAndOperandCycleData()
416 OS << "}\n"; in EmitStageAndOperandCycleData()
543 OS << StageTable; in EmitStageAndOperandCycleData()
544 OS << OperandCycleTable; in EmitStageAndOperandCycleData()
545 OS << BypassTable; in EmitStageAndOperandCycleData()
555 EmitItineraries(raw_ostream &OS, in EmitItineraries() argument
578 OS << "\n"; in EmitItineraries()
579 OS << "static const llvm::InstrItinerary "; in EmitItineraries()
581 OS << '*' << Name << " = nullptr;\n"; in EmitItineraries()
586 OS << Name << "[] = {\n"; in EmitItineraries()
594 OS << " { " << in EmitItineraries()
603 OS << " { 0, ~0U, ~0U, ~0U, ~0U } // end marker\n"; in EmitItineraries()
604 OS << "};\n"; in EmitItineraries()
611 void SubtargetEmitter::EmitProcessorProp(raw_ostream &OS, const Record *R, in EmitProcessorProp() argument
613 OS << " "; in EmitProcessorProp()
616 OS << V << Separator << " // " << Name; in EmitProcessorProp()
618 OS << "MCSchedModel::Default" << Name << Separator; in EmitProcessorProp()
619 OS << '\n'; in EmitProcessorProp()
623 raw_ostream &OS) { in EmitProcessorResources() argument
626 OS << "\n// {Name, NumUnits, SuperIdx, IsBuffered}\n"; in EmitProcessorResources()
627 OS << "static const llvm::MCProcResourceDesc " in EmitProcessorResources()
657 OS << " {DBGFIELD(\"" << PRDef->getName() << "\") "; in EmitProcessorResources()
659 OS.indent(15 - PRDef->getName().size()); in EmitProcessorResources()
660 OS << NumUnits << ", " << SuperIdx << ", " in EmitProcessorResources()
663 OS << ", Super=" << SuperDef->getName(); in EmitProcessorResources()
664 OS << "\n"; in EmitProcessorResources()
666 OS << "};\n"; in EmitProcessorResources()
1088 raw_ostream &OS) { in EmitSchedClassTables() argument
1090 OS << "\n// {ProcResourceIdx, Cycles}\n" in EmitSchedClassTables()
1097 OS << " {" << format("%2d", WPREntry.ProcResourceIdx) << ", " in EmitSchedClassTables()
1100 OS << ','; in EmitSchedClassTables()
1101 OS << " // #" << WPRIdx << '\n'; in EmitSchedClassTables()
1103 OS << "}; // " << Target << "WriteProcResTable\n"; in EmitSchedClassTables()
1106 OS << "\n// {Cycles, WriteResourceID}\n" in EmitSchedClassTables()
1113 OS << " {" << format("%2d", WLEntry.Cycles) << ", " in EmitSchedClassTables()
1116 OS << ','; in EmitSchedClassTables()
1117 OS << " // #" << WLIdx << " " << SchedTables.WriterNames[WLIdx] << '\n'; in EmitSchedClassTables()
1119 OS << "}; // " << Target << "WriteLatencyTable\n"; in EmitSchedClassTables()
1122 OS << "\n// {UseIdx, WriteResourceID, Cycles}\n" in EmitSchedClassTables()
1129 OS << " {" << RAEntry.UseIdx << ", " in EmitSchedClassTables()
1133 OS << ','; in EmitSchedClassTables()
1134 OS << " // #" << RAIdx << '\n'; in EmitSchedClassTables()
1136 OS << "}; // " << Target << "ReadAdvanceTable\n"; in EmitSchedClassTables()
1147 OS << "\n// {Name, NumMicroOps, BeginGroup, EndGroup," in EmitSchedClassTables()
1149 OS << "static const llvm::MCSchedClassDesc " in EmitSchedClassTables()
1156 OS << " {DBGFIELD(\"InvalidSchedClass\") " in EmitSchedClassTables()
1163 OS << " {DBGFIELD(\"" << SchedClass.Name << "\") "; in EmitSchedClassTables()
1165 OS.indent(18 - SchedClass.Name.size()); in EmitSchedClassTables()
1166 OS << MCDesc.NumMicroOps in EmitSchedClassTables()
1175 OS << ','; in EmitSchedClassTables()
1176 OS << " // #" << SCIdx << '\n'; in EmitSchedClassTables()
1178 OS << "}; // " << PI->ModelName << "SchedClasses\n"; in EmitSchedClassTables()
1182 void SubtargetEmitter::EmitProcessorModels(raw_ostream &OS) { in EmitProcessorModels() argument
1188 EmitProcessorResources(*PI, OS); in EmitProcessorModels()
1194 OS << "\n"; in EmitProcessorModels()
1195 OS << "static const llvm::MCSchedModel " << PI->ModelName << "(\n"; in EmitProcessorModels()
1196 EmitProcessorProp(OS, PI->ModelDef, "IssueWidth", ','); in EmitProcessorModels()
1197 EmitProcessorProp(OS, PI->ModelDef, "MicroOpBufferSize", ','); in EmitProcessorModels()
1198 EmitProcessorProp(OS, PI->ModelDef, "LoopMicroOpBufferSize", ','); in EmitProcessorModels()
1199 EmitProcessorProp(OS, PI->ModelDef, "LoadLatency", ','); in EmitProcessorModels()
1200 EmitProcessorProp(OS, PI->ModelDef, "HighLatency", ','); in EmitProcessorModels()
1201 EmitProcessorProp(OS, PI->ModelDef, "MispredictPenalty", ','); in EmitProcessorModels()
1203 OS << " " << (bool)(PI->ModelDef ? in EmitProcessorModels()
1207 OS << " " << PI->Index << ", // Processor ID\n"; in EmitProcessorModels()
1209 OS << " " << PI->ModelName << "ProcResources" << ",\n" in EmitProcessorModels()
1215 OS << " 0, 0, 0, 0, // No instruction-level machine model.\n"; in EmitProcessorModels()
1217 OS << " " << PI->ItinsDef->getName() << ");\n"; in EmitProcessorModels()
1219 OS << " 0); // No Itinerary\n"; in EmitProcessorModels()
1226 void SubtargetEmitter::EmitProcessorLookup(raw_ostream &OS) { in EmitProcessorLookup() argument
1233 OS << "\n"; in EmitProcessorLookup()
1234 OS << "// Sorted (by key) array of itineraries for CPU subtype.\n" in EmitProcessorLookup()
1248 OS << " { \"" << Name << "\", (const void *)&" << ProcModelName << " }"; in EmitProcessorLookup()
1251 if (++i < N) OS << ","; in EmitProcessorLookup()
1253 OS << "\n"; in EmitProcessorLookup()
1257 OS << "};\n"; in EmitProcessorLookup()
1263 void SubtargetEmitter::EmitSchedModel(raw_ostream &OS) { in EmitSchedModel() argument
1264 OS << "#ifdef DBGFIELD\n" in EmitSchedModel()
1276 EmitStageAndOperandCycleData(OS, ProcItinLists); in EmitSchedModel()
1277 EmitItineraries(OS, ProcItinLists); in EmitSchedModel()
1279 OS << "\n// ===============================================================\n" in EmitSchedModel()
1287 EmitSchedClassTables(SchedTables, OS); in EmitSchedModel()
1290 EmitProcessorModels(OS); in EmitSchedModel()
1292 EmitProcessorLookup(OS); in EmitSchedModel()
1294 OS << "#undef DBGFIELD"; in EmitSchedModel()
1298 raw_ostream &OS) { in EmitSchedModelHelpers() argument
1299 OS << "unsigned " << ClassName in EmitSchedModelHelpers()
1307 OS << (*PI)->getValueAsString("Code") << '\n'; in EmitSchedModelHelpers()
1317 OS << " switch (SchedClass) {\n"; in EmitSchedModelHelpers()
1321 OS << " case " << *VCI << ": // " << SC.Name << '\n'; in EmitSchedModelHelpers()
1334 OS << " "; in EmitSchedModelHelpers()
1336 OS << "if (SchedModel->getProcessorID() == " << *PI << ") "; in EmitSchedModelHelpers()
1337 OS << "{ // " << (SchedModels.procModelBegin() + *PI)->ModelName in EmitSchedModelHelpers()
1346 OS << " if ("; in EmitSchedModelHelpers()
1350 OS << "\n && "; in EmitSchedModelHelpers()
1351 OS << "(" << (*RI)->getValueAsString("Predicate") << ")"; in EmitSchedModelHelpers()
1353 OS << ")\n" in EmitSchedModelHelpers()
1357 OS << " }\n"; in EmitSchedModelHelpers()
1362 OS << " return " << SC.Index << ";\n"; in EmitSchedModelHelpers()
1363 OS << " break;\n"; in EmitSchedModelHelpers()
1365 OS << " };\n"; in EmitSchedModelHelpers()
1367 OS << " report_fatal_error(\"Expected a variant SchedClass\");\n" in EmitSchedModelHelpers()
1375 void SubtargetEmitter::ParseFeaturesFunction(raw_ostream &OS, in ParseFeaturesFunction() argument
1382 OS << "// ParseSubtargetFeatures - Parses features string setting specified\n" in ParseFeaturesFunction()
1385 OS << Target; in ParseFeaturesFunction()
1386 OS << "Subtarget::ParseSubtargetFeatures(StringRef CPU, StringRef FS) {\n" in ParseFeaturesFunction()
1391 OS << "}\n"; in ParseFeaturesFunction()
1395 OS << " InitMCProcessorInfo(CPU, FS);\n" in ParseFeaturesFunction()
1406 OS << " if ((Bits & " << Target << "::" in ParseFeaturesFunction()
1410 OS << " if ((Bits & " << Target << "::" in ParseFeaturesFunction()
1416 OS << "}\n"; in ParseFeaturesFunction()
1422 void SubtargetEmitter::run(raw_ostream &OS) { in run() argument
1423 emitSourceFileHeader("Subtarget Enumeration Source Fragment", OS); in run()
1425 OS << "\n#ifdef GET_SUBTARGETINFO_ENUM\n"; in run()
1426 OS << "#undef GET_SUBTARGETINFO_ENUM\n"; in run()
1428 OS << "namespace llvm {\n"; in run()
1429 Enumeration(OS, "SubtargetFeature", true); in run()
1430 OS << "} // End llvm namespace \n"; in run()
1431 OS << "#endif // GET_SUBTARGETINFO_ENUM\n\n"; in run()
1433 OS << "\n#ifdef GET_SUBTARGETINFO_MC_DESC\n"; in run()
1434 OS << "#undef GET_SUBTARGETINFO_MC_DESC\n"; in run()
1436 OS << "namespace llvm {\n"; in run()
1438 OS << "namespace {\n"; in run()
1440 unsigned NumFeatures = FeatureKeyValues(OS); in run()
1441 OS << "\n"; in run()
1442 unsigned NumProcs = CPUKeyValues(OS); in run()
1443 OS << "\n"; in run()
1444 EmitSchedModel(OS); in run()
1445 OS << "\n"; in run()
1447 OS << "}\n"; in run()
1451 OS << "static inline void Init" << Target in run()
1454 OS << " II->InitMCSubtargetInfo(TT, CPU, FS, "; in run()
1456 OS << Target << "FeatureKV, "; in run()
1458 OS << "None, "; in run()
1460 OS << Target << "SubTypeKV, "; in run()
1462 OS << "None, "; in run()
1463 OS << '\n'; OS.indent(22); in run()
1464 OS << Target << "ProcSchedKV, " in run()
1469 OS << '\n'; OS.indent(22); in run()
1470 OS << Target << "Stages, " in run()
1474 OS << "0, 0, 0"; in run()
1475 OS << ");\n}\n\n"; in run()
1477 OS << "} // End llvm namespace \n"; in run()
1479 OS << "#endif // GET_SUBTARGETINFO_MC_DESC\n\n"; in run()
1481 OS << "\n#ifdef GET_SUBTARGETINFO_TARGET_DESC\n"; in run()
1482 OS << "#undef GET_SUBTARGETINFO_TARGET_DESC\n"; in run()
1484 OS << "#include \"llvm/Support/Debug.h\"\n"; in run()
1485 ParseFeaturesFunction(OS, NumFeatures, NumProcs); in run()
1487 OS << "#endif // GET_SUBTARGETINFO_TARGET_DESC\n\n"; in run()
1490 OS << "\n#ifdef GET_SUBTARGETINFO_HEADER\n"; in run()
1491 OS << "#undef GET_SUBTARGETINFO_HEADER\n"; in run()
1494 OS << "namespace llvm {\n"; in run()
1495 OS << "class DFAPacketizer;\n"; in run()
1496 OS << "struct " << ClassName << " : public TargetSubtargetInfo {\n" in run()
1505 OS << "} // End llvm namespace \n"; in run()
1507 OS << "#endif // GET_SUBTARGETINFO_HEADER\n\n"; in run()
1509 OS << "\n#ifdef GET_SUBTARGETINFO_CTOR\n"; in run()
1510 OS << "#undef GET_SUBTARGETINFO_CTOR\n"; in run()
1512 OS << "#include \"llvm/CodeGen/TargetSchedule.h\"\n"; in run()
1513 OS << "namespace llvm {\n"; in run()
1514 OS << "extern const llvm::SubtargetFeatureKV " << Target << "FeatureKV[];\n"; in run()
1515 OS << "extern const llvm::SubtargetFeatureKV " << Target << "SubTypeKV[];\n"; in run()
1516 OS << "extern const llvm::SubtargetInfoKV " << Target << "ProcSchedKV[];\n"; in run()
1517 OS << "extern const llvm::MCWriteProcResEntry " in run()
1519 OS << "extern const llvm::MCWriteLatencyEntry " in run()
1521 OS << "extern const llvm::MCReadAdvanceEntry " in run()
1525 OS << "extern const llvm::InstrStage " << Target << "Stages[];\n"; in run()
1526 OS << "extern const unsigned " << Target << "OperandCycles[];\n"; in run()
1527 OS << "extern const unsigned " << Target << "ForwardingPaths[];\n"; in run()
1530 OS << ClassName << "::" << ClassName << "(StringRef TT, StringRef CPU, " in run()
1535 OS << "makeArrayRef(" << Target << "FeatureKV, " << NumFeatures << "), "; in run()
1537 OS << "None, "; in run()
1539 OS << "makeArrayRef(" << Target << "SubTypeKV, " << NumProcs << "), "; in run()
1541 OS << "None, "; in run()
1542 OS << '\n'; OS.indent(22); in run()
1543 OS << Target << "ProcSchedKV, " in run()
1547 OS << '\n'; OS.indent(22); in run()
1549 OS << Target << "Stages, " in run()
1553 OS << "0, 0, 0"; in run()
1554 OS << ");\n}\n\n"; in run()
1556 EmitSchedModelHelpers(ClassName, OS); in run()
1558 OS << "} // End llvm namespace \n"; in run()
1560 OS << "#endif // GET_SUBTARGETINFO_CTOR\n\n"; in run()
1565 void EmitSubtarget(RecordKeeper &RK, raw_ostream &OS) { in EmitSubtarget() argument
1567 SubtargetEmitter(RK, CGTarget).run(OS); in EmitSubtarget()