Lines Matching refs:Arith
1321 i->ARM64in.Arith.dst = dst; in ARM64Instr_Arith()
1322 i->ARM64in.Arith.argL = argL; in ARM64Instr_Arith()
1323 i->ARM64in.Arith.argR = argR; in ARM64Instr_Arith()
1324 i->ARM64in.Arith.isAdd = isAdd; in ARM64Instr_Arith()
1939 vex_printf("%s ", i->ARM64in.Arith.isAdd ? "add" : "sub"); in ppARM64Instr()
1940 ppHRegARM64(i->ARM64in.Arith.dst); in ppARM64Instr()
1942 ppHRegARM64(i->ARM64in.Arith.argL); in ppARM64Instr()
1944 ppARM64RIA(i->ARM64in.Arith.argR); in ppARM64Instr()
2560 addHRegUse(u, HRmWrite, i->ARM64in.Arith.dst); in getRegUsage_ARM64Instr()
2561 addHRegUse(u, HRmRead, i->ARM64in.Arith.argL); in getRegUsage_ARM64Instr()
2562 addRegUsage_ARM64RIA(u, i->ARM64in.Arith.argR); in getRegUsage_ARM64Instr()
2928 i->ARM64in.Arith.dst = lookupHRegRemap(m, i->ARM64in.Arith.dst); in mapRegs_ARM64Instr()
2929 i->ARM64in.Arith.argL = lookupHRegRemap(m, i->ARM64in.Arith.argL); in mapRegs_ARM64Instr()
2930 mapRegs_ARM64RIA(m, i->ARM64in.Arith.argR); in mapRegs_ARM64Instr()
4032 UInt rD = iregNo(i->ARM64in.Arith.dst); in emit_ARM64Instr()
4033 UInt rN = iregNo(i->ARM64in.Arith.argL); in emit_ARM64Instr()
4034 ARM64RIA* argR = i->ARM64in.Arith.argR; in emit_ARM64Instr()
4038 i->ARM64in.Arith.isAdd ? X10 : X11, in emit_ARM64Instr()
4045 UInt rM = iregNo(i->ARM64in.Arith.argR->ARM64riA.R.reg); in emit_ARM64Instr()
4047 i->ARM64in.Arith.isAdd ? X100 : X110, in emit_ARM64Instr()