Lines Matching refs:VBinS
1601 i->ARM64in.VBinS.op = op; in ARM64Instr_VBinS()
1602 i->ARM64in.VBinS.dst = dst; in ARM64Instr_VBinS()
1603 i->ARM64in.VBinS.argL = argL; in ARM64Instr_VBinS()
1604 i->ARM64in.VBinS.argR = argR; in ARM64Instr_VBinS()
2246 vex_printf("f%s ", showARM64FpBinOp(i->ARM64in.VBinS.op)); in ppARM64Instr()
2247 ppHRegARM64asSreg(i->ARM64in.VBinS.dst); in ppARM64Instr()
2249 ppHRegARM64asSreg(i->ARM64in.VBinS.argL); in ppARM64Instr()
2251 ppHRegARM64asSreg(i->ARM64in.VBinS.argR); in ppARM64Instr()
2760 addHRegUse(u, HRmWrite, i->ARM64in.VBinS.dst); in getRegUsage_ARM64Instr()
2761 addHRegUse(u, HRmRead, i->ARM64in.VBinS.argL); in getRegUsage_ARM64Instr()
2762 addHRegUse(u, HRmRead, i->ARM64in.VBinS.argR); in getRegUsage_ARM64Instr()
3053 i->ARM64in.VBinS.dst = lookupHRegRemap(m, i->ARM64in.VBinS.dst); in mapRegs_ARM64Instr()
3054 i->ARM64in.VBinS.argL = lookupHRegRemap(m, i->ARM64in.VBinS.argL); in mapRegs_ARM64Instr()
3055 i->ARM64in.VBinS.argR = lookupHRegRemap(m, i->ARM64in.VBinS.argR); in mapRegs_ARM64Instr()
4951 UInt sD = dregNo(i->ARM64in.VBinS.dst); in emit_ARM64Instr()
4952 UInt sN = dregNo(i->ARM64in.VBinS.argL); in emit_ARM64Instr()
4953 UInt sM = dregNo(i->ARM64in.VBinS.argR); in emit_ARM64Instr()
4955 switch (i->ARM64in.VBinS.op) { in emit_ARM64Instr()