| /external/llvm/lib/Target/AArch64/ |
| D | AArch64LoadStoreOptimizer.cpp | 396 unsigned BaseReg = FirstMI->getOperand(1).getReg(); in findMatchingInsn() local
606 static bool isMatchingUpdateInsn(MachineInstr *MI, unsigned BaseReg, in isMatchingUpdateInsn()
647 unsigned BaseReg = MemMI->getOperand(1).getReg(); in findMatchingUpdateInsnForward() local
702 unsigned BaseReg = MemMI->getOperand(1).getReg(); in findMatchingUpdateInsnBackward() local
|
| D | AArch64RegisterInfo.cpp | 286 unsigned BaseReg, in materializeFrameBaseRegister()
306 void AArch64RegisterInfo::resolveFrameIndex(MachineInstr &MI, unsigned BaseReg, in resolveFrameIndex()
|
| D | AArch64StorePairSuppress.cpp | 148 unsigned BaseReg; in runOnMachineFunction() local
|
| /external/llvm/lib/Target/X86/ |
| D | X86CodeEmitter.cpp | 482 unsigned BaseReg = Base.getReg(); in emitMemModRMByte() local
613 const MachineOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is16BitMemOperand() local
627 const MachineOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is32BitMemOperand() local
642 const MachineOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is64BitMemOperand() local
|
| D | X86AsmPrinter.cpp | 235 const MachineOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); in printLeaMemReference() local
300 const MachineOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); in printIntelMemReference() local
|
| D | X86MCInstLower.cpp | 691 unsigned Opc, BaseReg, ScaleVal, IndexReg, Displacement, SegmentReg; in EmitNops() local
|
| D | X86InstrInfo.cpp | 1633 static bool regIsPICBase(unsigned BaseReg, const MachineRegisterInfo &MRI) { in regIsPICBase()
1690 unsigned BaseReg = MI->getOperand(1+X86::AddrBaseReg).getReg(); in isReallyTriviallyReMaterializable() local
1712 unsigned BaseReg = MI->getOperand(1+X86::AddrBaseReg).getReg(); in isReallyTriviallyReMaterializable() local
|
| /external/llvm/lib/Target/ARM/ |
| D | Thumb1RegisterInfo.cpp | 91 unsigned DestReg, unsigned BaseReg, in emitThumbRegPlusImmInReg()
168 unsigned DestReg, unsigned BaseReg, in emitThumbRegPlusImmediate()
485 void Thumb1RegisterInfo::resolveFrameIndex(MachineInstr &MI, unsigned BaseReg, in resolveFrameIndex()
|
| D | Thumb2SizeReduction.cpp | 418 unsigned BaseReg = MI->getOperand(0).getReg(); in ReduceLoadStore() local
440 unsigned BaseReg = MI->getOperand(1).getReg(); in ReduceLoadStore() local
454 unsigned BaseReg = MI->getOperand(1).getReg(); in ReduceLoadStore() local
|
| D | ARMBaseRegisterInfo.cpp | 581 unsigned BaseReg, int FrameIdx, in materializeFrameBaseRegister()
605 void ARMBaseRegisterInfo::resolveFrameIndex(MachineInstr &MI, unsigned BaseReg, in resolveFrameIndex()
|
| D | Thumb2InstrInfo.cpp | 214 unsigned DestReg, unsigned BaseReg, int NumBytes, in emitT2RegPlusImmediate()
|
| D | ARMLoadStoreOptimizer.cpp | 1363 unsigned BaseReg, bool BaseKill, bool BaseUndef, in InsertLDR_STR()
1389 unsigned BaseReg = BaseOp.getReg(); in FixInvalidRegPairOp() local
1878 unsigned &OddReg, unsigned &BaseReg, in CanFormLdStDWord()
2037 unsigned BaseReg = 0, PredReg = 0; in RescheduleOps() local
|
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCCodeEmitter.cpp | 60 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is16BitMemOperand() local
249 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is32BitMemOperand() local
264 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is64BitMemOperand() local
395 unsigned BaseReg = Base.getReg(); in EmitMemModRMByte() local
|
| /external/llvm/lib/Target/X86/InstPrinter/ |
| D | X86IntelInstPrinter.cpp | 166 const MCOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); in printMemReference() local
|
| D | X86ATTInstPrinter.cpp | 186 const MCOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); in printMemReference() local
|
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsNaClELFStreamer.cpp | 122 unsigned BaseReg = MI.getOperand(AddrIdx).getReg(); in sandboxLoadStoreStackChange() local
|
| /external/llvm/lib/Target/X86/AsmParser/ |
| D | X86AsmParser.cpp | 253 unsigned BaseReg, IndexReg, TmpReg, Scale; member in __anon1569cd850111::X86AsmParser::IntelExprStateMachine
772 static bool CheckBaseRegAndIndexReg(unsigned BaseReg, unsigned IndexReg, in CheckBaseRegAndIndexReg()
979 unsigned SegReg, const MCExpr *Disp, unsigned BaseReg, unsigned IndexReg, in CreateMemForInlineAsm()
1245 int BaseReg = SM.getBaseReg(); in ParseIntelBracExpression() local
1770 unsigned BaseReg = 0, IndexReg = 0, Scale = 1; in ParseMemOperand() local
|
| D | X86Operand.h | 52 unsigned BaseReg; member
|
| /external/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 765 unsigned BaseReg, int FrameIdx, in materializeFrameBaseRegister()
773 virtual void resolveFrameIndex(MachineInstr &MI, unsigned BaseReg, in resolveFrameIndex()
|
| D | TargetInstrInfo.h | 655 unsigned &BaseReg, unsigned &Offset, in getLdStBaseRegImmOfs()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCRegisterInfo.cpp | 944 unsigned BaseReg, int FrameIdx, in materializeFrameBaseRegister()
963 void PPCRegisterInfo::resolveFrameIndex(MachineInstr &MI, unsigned BaseReg, in resolveFrameIndex()
|
| /external/llvm/lib/CodeGen/ |
| D | LocalStackSlotAllocation.cpp | 327 unsigned BaseReg = 0; in insertFrameReferenceRegisters() local
|
| /external/clang/lib/StaticAnalyzer/Core/ |
| D | Store.cpp | 285 const MemRegion *BaseReg = in evalDerivedToBase() local
|
| /external/llvm/lib/Target/R600/ |
| D | AMDGPUISelDAGToDAG.cpp | 601 SDValue& BaseReg, SDValue &Offset) { in SelectGlobalValueVariableOffset()
|
| /external/llvm/lib/Target/Sparc/AsmParser/ |
| D | SparcAsmParser.cpp | 550 unsigned BaseReg = 0; in parseMEMOperand() local
|