| /external/llvm/lib/Target/R600/ |
| D | SIMachineFunctionInfo.cpp | 89 int Lane) { in addSpilledReg()
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| D | SIMachineFunctionInfo.h | 33 int Lane; member
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| D | SIInstrInfo.cpp | 203 unsigned Lane = MFI->SpillTracker.reserveLanes(MRI, MF); in storeRegToStackSlot() local
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| D | SIISelLowering.cpp | 1559 unsigned Lane = 0; in adjustWritemask() local
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| /external/llvm/lib/Target/ARM/ |
| D | A15SDOptimizer.cpp | 428 unsigned Reg, unsigned Lane, bool QPR) { in createDupLane()
447 unsigned DReg, unsigned Lane, in createExtractSubreg()
498 DebugLoc DL, unsigned DReg, unsigned Lane, in createInsertSubreg()
564 unsigned Lane; in optimizeAllLanesPattern() local
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| D | ARMExpandPseudoInsts.cpp | 513 unsigned Lane = MI.getOperand(MI.getDesc().getNumOperands() - 3).getImm(); in ExpandLaneOp() local
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| D | ARMBaseInstrInfo.cpp | 4004 unsigned SReg, unsigned &Lane) { in getCorrespondingDRegAndLane()
4035 unsigned DReg, unsigned Lane, in getImplicitSPRUseForDPRUse()
4064 unsigned Lane; in setExecutionDomain() local
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| D | ARMCodeEmitter.cpp | 1836 unsigned Lane = MI.getOperand(LnOpIdx).getImm() << LaneShift; in emitNEONLaneInstruction() local
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| D | ARMISelLowering.cpp | 5429 int Lane = SVN->getSplatIndex(); in LowerVECTOR_SHUFFLE() local
5562 SDValue Lane = Op.getOperand(2); in LowerINSERT_VECTOR_ELT() local
5571 SDValue Lane = Op.getOperand(1); in LowerEXTRACT_VECTOR_ELT() local
9445 SDValue Lane = N0.getOperand(1); in PerformExtendCombine() local
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| D | ARMISelDAGToDAG.cpp | 2067 unsigned Lane = in SelectVLDSTLane() local
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| /external/llvm/lib/Transforms/Vectorize/ |
| D | SLPVectorizer.cpp | 549 int Lane; member
605 for (int Lane = 0, LE = Entry->Scalars.size(); Lane != LE; ++Lane) { in buildTree() local
1561 for (unsigned Lane = 0, LE = VL.size(); Lane != LE; ++Lane) { in Gather() local
1971 Value *Lane = Builder.getInt32(it->Lane); in vectorizeTree() local
2005 for (int Lane = 0, LE = Entry->Scalars.size(); Lane != LE; ++Lane) { in vectorizeTree() local
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 2878 unsigned Lane = MI->getOperand(2).getImm(); in emitCOPY_FW() local
2911 unsigned Lane = MI->getOperand(2).getImm() * 2; in emitCOPY_FD() local
2941 unsigned Lane = MI->getOperand(2).getImm(); in emitINSERT_FW() local
2975 unsigned Lane = MI->getOperand(2).getImm(); in emitINSERT_FD() local
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| /external/llvm/lib/Analysis/ |
| D | ConstantFolding.cpp | 1741 SmallVector<Constant *, 4> Lane(Operands.size()); in ConstantFoldVectorCall() local
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 4613 SDValue Lane = DAG.getConstant(OpNum - OP_VDUP0, MVT::i64); in GeneratePerfectShuffle() local
4737 int Lane = SVN->getSplatIndex(); in LowerVECTOR_SHUFFLE() local
5202 SDValue Lane = Op.getOperand(I); in NormalizeBuildVector() local
5493 SDValue Lane = Value.getOperand(1); in LowerBUILD_VECTOR() local
6724 SDValue Lane = Op1.getOperand(1); in tryCombineFixedPointConvert() local
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| /external/clang/lib/CodeGen/ |
| D | CGBuiltin.cpp | 3405 int Lane = cast<ConstantInt>(Ops[2])->getZExtValue(); in EmitARMBuiltinExpr() local
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