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Searched defs:RT (Results 1 – 25 of 90) sorted by relevance

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/external/valgrind/main/none/tests/mips32/
Dmips32_dsp.c39 #define TESTDSPINST_RD_RT_DSPC(instruction, RTval, RD, RT) \ argument
59 #define TESTDSPINST_RD_RT_NODSPC(instruction, RTval, RD, RT) \ argument
76 #define TESTDSPINST_RD_RS_RT_DSPC(instruction, RSval, RTval, RD, RS, RT) \ argument
119 #define TESTDSPINST_RS_RT_DSPC(instruction, RSval, RTval, RS, RT) \ argument
137 #define TESTDSPINST_RD_RS_RT_NODSPC(instruction, RSval, RTval, RD, RS, RT) \ argument
155 #define TESTDSPINST_AC_RS_RT_DSPC(instruction, ac, RSval, RTval, HIval, LOval, \ argument
183 #define TESTDSPINST_AC_RS_RT_NODSPC(instruction, ac, RSval, RTval, HIval, \ argument
207 #define TESTDSPINST_EXT(instruction, ac, RT, HIval, LOval, size, pos) \ argument
230 #define TESTDSPINST_EXTV(instruction, ac, RT, HIval, LOval, RS, RSval, pos) \ argument
254 #define TESTDSPINST_INSV(instruction, RTval, RSval, RT, RS, _pos, _size) \ argument
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Dmips32_dspr2.c39 #define TESTDSPINST_RD_RT_DSPC(instruction, RTval, RD, RT) \ argument
59 #define TESTDSPINST_RD_RT_NODSPC(instruction, RTval, RD, RT) \ argument
92 #define TESTDSPINST_RD_RS_RT_DSPC(instruction, RSval, RTval, RD, RS, RT) \ argument
134 #define TESTDSPINST_RS_RT_DSPC(instruction, RSval, RTval, RS, RT) \ argument
152 #define TESTDSPINST_RD_RS_RT_NODSPC(instruction, RSval, RTval, RD, RS, RT) \ argument
170 #define TESTDSPINST_AC_RS_RT_DSPC(instruction, ac, RSval, RTval, HIval, LOval, \ argument
222 #define TESTDSPINST_EXT(instruction, ac, RT, HIval, LOval, size, pos) \ argument
245 #define TESTDSPINST_EXTV(instruction, ac, RT, HIval, LOval, RS, RSval, pos) \ argument
269 #define TESTDSPINST_INSV(instruction, RTval, RSval, RT, RS, _pos, _size) \ argument
290 #define TESTDSPINST_LWX(index, RT, RS) \ argument
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DMIPS32int.c3 #define TESTINST1(instruction, RSval, RTval, RD, RS, RT) \ argument
20 #define TESTINST2(instruction, RSval, imm, RT, RS) \ argument
50 #define TESTINST3a(instruction, RSval, RTval, RS, RT) \ argument
71 #define TESTINST4(instruction, RTval, RSval, RT, RS, pos, size) \ argument
95 #define TESTINSN5LOAD(instruction, RTval, offset, RT) \ argument
DMoveIns.c25 #define TESTINSNMOVE(instruction, offset, FS, RT) \ argument
44 #define TESTINSNMOVEd(instruction, offset, FS, RT) \ argument
63 #define TESTINSNMOVEt(instruction, offset, FS, RT) \ argument
82 #define TESTINSNMOVEtd(instruction, offset, FS, RT) \ argument
238 #define TESTINSNMOVEN1s(instruction, offset, RTval, FD, FS, RT) \ argument
259 #define TESTINSNMOVEN1d(instruction, offset, RTval, FD, FS, RT) \ argument
DLoadStore1.c24 #define TESTINST1(instruction, RTval, offset, RT, RS) \ argument
54 #define TESTINSTsw(RTval, offset, RT, RS) \ argument
DLoadStore.c24 #define TESTINST1(instruction, RTval, offset, RT, RS) \ argument
54 #define TESTINSTsw(RTval, offset, RT, RS) \ argument
Dvfp.c49 #define TESTINSN5LOAD(instruction, RTval, offset, RT) \ argument
69 #define TESTINSN5LOAD(instruction, RTval, offset, RT) \ argument
91 #define TESTINSN5LOADw(instruction, RTval, offset, RT) \ argument
Dbranches.c114 #define TESTINST4(instruction, RDval, RSval, RTval, RD, RS, RT) \ argument
179 #define TESTINST4l(instruction, RDval, RSval, RTval, RD, RS, RT) \ argument
/external/valgrind/main/none/tests/mips64/
Dmacro_int.h1 #define TEST1(instruction, RSval, RTval, RD, RS, RT) \ argument
19 #define TEST2(instruction, RSval, imm, RT, RS) \ argument
51 #define TEST4(instruction, RSval, RTval, RS, RT) \ argument
71 #define TEST5(instruction, RSval, RTval, RS, RT) \ argument
91 #define TEST6(instruction, imm, RT) \ argument
Dcvm_ins.c70 #define TESTINST1(instruction, RSVal, RT, RS, p, lenm1) \ argument
85 #define TESTINST2(instruction, RSVal, RTval, RD, RS, RT) \ argument
101 #define TESTINST3(instruction, RSVal, RT, RS,imm) \ argument
Dload_store_multiple.c23 #define TESTINST1(instruction, RTval, offset, RT, RS) \ argument
53 #define TESTINSTsw(RTval, offset, RT, RS) \ argument
Dmove_instructions.c139 #define TEST4(instruction, offset, RTval, FD, FS, RT) \ argument
158 #define TEST4d(instruction, offset, RTval, FD, FS, RT) \ argument
Dbranches.c130 #define TESTINST4(instruction, RDval, RSval, RTval, RD, RS, RT) \ argument
201 #define TESTINST4l(instruction, RDval, RSval, RTval, RD, RS, RT) \ argument
Dbranch_and_jump_instructions.c107 #define TEST3(instruction, RDval, RSval, RTval, RD, RS, RT) \ argument
/external/clang/lib/CodeGen/
DCodeGenTypes.cpp159 if (const RecordType *RT = dyn_cast<RecordType>(T)) in isSafeToConvert() local
199 const RecordType *RT = dyn_cast<RecordType>(TT); in isFuncParamTypeConvertible() local
297 if (const RecordType *RT = dyn_cast<RecordType>(Ty)) in ConvertType() local
480 if (const RecordType *RT = FT->getReturnType()->getAs<RecordType>()) in ConvertType() local
484 if (const RecordType *RT = FPT->getParamType(i)->getAs<RecordType>()) in ConvertType() local
713 if (const RecordType *RT = T->getAs<RecordType>()) { in isZeroInitializable() local
/external/clang/lib/AST/
DType.cpp366 if (const RecordType *RT = getAs<RecordType>()) in isClassType() local
371 if (const RecordType *RT = getAs<RecordType>()) in isStructureType() local
376 if (const RecordType *RT = getAs<RecordType>()) in isInterfaceType() local
381 if (const RecordType *RT = getAs<RecordType>()) in isStructureOrClassType() local
393 if (const RecordType *RT = getAs<RecordType>()) in isUnionType() local
423 if (const ReferenceType *RT = getAs<ReferenceType>()) in getPointeeType() local
434 if (const RecordType *RT = dyn_cast<RecordType>(this)) { in getAsStructureType() local
440 if (const RecordType *RT = dyn_cast<RecordType>(CanonicalType)) { in getAsStructureType() local
453 if (const RecordType *RT = dyn_cast<RecordType>(this)) { in getAsUnionType() local
459 if (const RecordType *RT = dyn_cast<RecordType>(CanonicalType)) { in getAsUnionType() local
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/external/emma/core/java12/com/vladium/emma/rt/
DRT.java27 abstract class RT implements IAppConstants class
176 private RT () {} // prevent subclassing in RT() method in RT
DRTExitHook.java105 RTExitHook (final Class RT, final ICoverageData cdata, final File outFile, final boolean merge) in RTExitHook()
/external/clang/lib/Sema/
DSemaExceptionSpec.cpp66 } else if (const ReferenceType *RT = T->getAs<ReferenceType>()) { in CheckSpecifiedExceptionType() local
825 else if (const ReferenceType *RT = T->getAs<ReferenceType>()) in canCalleeThrow() local
863 const RecordType *RT = Op->getType()->getAs<RecordType>(); in canTypeidThrow() local
959 if (const RecordType *RT = DTy->getAs<RecordType>()) { in canThrow() local
/external/clang/lib/StaticAnalyzer/Checkers/
DReturnUndefChecker.cpp47 QualType RT = CallEvent::getDeclaredResultType(SFC->getDecl()); in checkPreStmt() local
DCastSizeChecker.cpp51 const RecordType *RT = ToPointeeTy->getAs<RecordType>(); in evenFlexibleArraySize() local
DLLVMConventionsChecker.cpp31 const RecordType *RT = T->getAs<RecordType>(); in IsLLVMStringRef() local
252 if (const RecordType *RT = T->getAs<RecordType>()) { in Visit() local
/external/valgrind/main/memcheck/tests/ppc32/
Dpower_ISA2_05.c171 int RT; in test_reservation() local
/external/llvm/lib/Target/ARM/
DARMJITInfo.cpp240 ARM::RelocationType RT = (ARM::RelocationType)MR->getRelocationType(); in resolveRelocDestAddr() local
/external/valgrind/main/memcheck/tests/ppc64/
Dpower_ISA2_05.c170 int RT; in test_reservation() local

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