| /external/valgrind/main/none/tests/mips32/ |
| D | mips32_dspr2.c | 39 #define TESTDSPINST_RD_RT_DSPC(instruction, RTval, RD, RT) \ argument
59 #define TESTDSPINST_RD_RT_NODSPC(instruction, RTval, RD, RT) \ argument
75 #define TESTDSPINST_RD_RT_RS_NODSPC(instruction, RTval, RSval) \ argument
92 #define TESTDSPINST_RD_RS_RT_DSPC(instruction, RSval, RTval, RD, RS, RT) \ argument
134 #define TESTDSPINST_RS_RT_DSPC(instruction, RSval, RTval, RS, RT) \ argument
152 #define TESTDSPINST_RD_RS_RT_NODSPC(instruction, RSval, RTval, RD, RS, RT) \ argument
170 #define TESTDSPINST_AC_RS_RT_DSPC(instruction, ac, RSval, RTval, HIval, LOval, \ argument
198 #define TESTDSPINST_AC_RS_RT_NODSPC(instruction, HIval, LOval, RSval, RTval) \ argument
269 #define TESTDSPINST_INSV(instruction, RTval, RSval, RT, RS, _pos, _size) \ argument
382 #define TESTDSPINST_PICK(instruction, instruction1, RSval, RTval, RD, RS, RT) \ argument
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| D | mips32_dsp.c | 39 #define TESTDSPINST_RD_RT_DSPC(instruction, RTval, RD, RT) \ argument
59 #define TESTDSPINST_RD_RT_NODSPC(instruction, RTval, RD, RT) \ argument
76 #define TESTDSPINST_RD_RS_RT_DSPC(instruction, RSval, RTval, RD, RS, RT) \ argument
119 #define TESTDSPINST_RS_RT_DSPC(instruction, RSval, RTval, RS, RT) \ argument
137 #define TESTDSPINST_RD_RS_RT_NODSPC(instruction, RSval, RTval, RD, RS, RT) \ argument
155 #define TESTDSPINST_AC_RS_RT_DSPC(instruction, ac, RSval, RTval, HIval, LOval, \ argument
183 #define TESTDSPINST_AC_RS_RT_NODSPC(instruction, ac, RSval, RTval, HIval, \ argument
254 #define TESTDSPINST_INSV(instruction, RTval, RSval, RT, RS, _pos, _size) \ argument
366 #define TESTDSPINST_PICK(instruction, instruction1, RSval, RTval, RD, RS, RT) \ argument
477 #define TESTDSPINST_RD_RT_SA_DSPC(instruction, RTval, SAval, RD, RT) \ argument
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| D | MIPS32int.c | 3 #define TESTINST1(instruction, RSval, RTval, RD, RS, RT) \ argument
50 #define TESTINST3a(instruction, RSval, RTval, RS, RT) \ argument
71 #define TESTINST4(instruction, RTval, RSval, RT, RS, pos, size) \ argument
95 #define TESTINSN5LOAD(instruction, RTval, offset, RT) \ argument
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| D | LoadStore1.c | 24 #define TESTINST1(instruction, RTval, offset, RT, RS) \ argument
54 #define TESTINSTsw(RTval, offset, RT, RS) \ argument
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| D | LoadStore.c | 24 #define TESTINST1(instruction, RTval, offset, RT, RS) \ argument
54 #define TESTINSTsw(RTval, offset, RT, RS) \ argument
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| D | vfp.c | 49 #define TESTINSN5LOAD(instruction, RTval, offset, RT) \ argument
69 #define TESTINSN5LOAD(instruction, RTval, offset, RT) \ argument
91 #define TESTINSN5LOADw(instruction, RTval, offset, RT) \ argument
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| D | branches.c | 114 #define TESTINST4(instruction, RDval, RSval, RTval, RD, RS, RT) \ argument
179 #define TESTINST4l(instruction, RDval, RSval, RTval, RD, RS, RT) \ argument
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| D | MoveIns.c | 238 #define TESTINSNMOVEN1s(instruction, offset, RTval, FD, FS, RT) \ argument
259 #define TESTINSNMOVEN1d(instruction, offset, RTval, FD, FS, RT) \ argument
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| /external/valgrind/main/none/tests/mips64/ |
| D | macro_int.h | 1 #define TEST1(instruction, RSval, RTval, RD, RS, RT) \ argument
51 #define TEST4(instruction, RSval, RTval, RS, RT) \ argument
71 #define TEST5(instruction, RSval, RTval, RS, RT) \ argument
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| D | load_store_multiple.c | 23 #define TESTINST1(instruction, RTval, offset, RT, RS) \ argument
53 #define TESTINSTsw(RTval, offset, RT, RS) \ argument
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| D | move_instructions.c | 139 #define TEST4(instruction, offset, RTval, FD, FS, RT) \ argument
158 #define TEST4d(instruction, offset, RTval, FD, FS, RT) \ argument
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| D | branches.c | 130 #define TESTINST4(instruction, RDval, RSval, RTval, RD, RS, RT) \ argument
201 #define TESTINST4l(instruction, RDval, RSval, RTval, RD, RS, RT) \ argument
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| D | branch_and_jump_instructions.c | 107 #define TEST3(instruction, RDval, RSval, RTval, RD, RS, RT) \ argument
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| D | cvm_ins.c | 85 #define TESTINST2(instruction, RSVal, RTval, RD, RS, RT) \ argument
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