| /external/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.h | 92 unsigned SrcReg, bool isKill, int FrameIndex, in storeRegToStackSlot()
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| D | MipsSEInstrInfo.cpp | 184 unsigned SrcReg, bool isKill, int FI, in storeRegToStack()
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| D | Mips16InstrInfo.cpp | 98 unsigned SrcReg, bool isKill, int FI, in storeRegToStack()
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| /external/llvm/lib/Target/ARM/ |
| D | Thumb1InstrInfo.cpp | 52 unsigned SrcReg, bool isKill, int FI, in storeRegToStackSlot()
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| D | Thumb2InstrInfo.cpp | 127 unsigned SrcReg, bool isKill, int FI, in storeRegToStackSlot()
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| D | Thumb1FrameLowering.cpp | 428 bool isKill = true; in spillCalleeSavedRegisters() local
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| D | ARMLoadStoreOptimizer.cpp | 86 bool isKill; member
645 bool isKill = memOps[i].isKill || KilledRegs.count(Reg); in MergeOpsUpdate() local
1532 bool isKill = MO.isDef() ? false : MO.isKill(); in LoadStoreMultipleOpti() local
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| D | Thumb1RegisterInfo.cpp | 266 bool isKill = BaseReg != ARM::SP; in emitThumbRegPlusImmediate() local
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrBuilder.h | 109 unsigned Reg, bool isKill, int Offset) { in addRegOffset()
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| D | X86InstrInfo.cpp | 1864 unsigned &NewSrc, bool &isKill, bool &isUndef, in classifyLEAReg()
1946 bool isKill = MI->getOperand(1).isKill(); in convertToThreeAddressWithLEA() local
2133 bool isKill, isUndef; in convertToThreeAddress() local
2173 bool isKill, isUndef; in convertToThreeAddress() local
2205 bool isKill, isUndef; in convertToThreeAddress() local
2242 bool isKill, isUndef; in convertToThreeAddress() local
2312 bool isKill, isUndef; in convertToThreeAddress() local
3283 unsigned SrcReg, bool isKill, int FrameIdx, in storeRegToStackSlot()
3300 bool isKill, in storeRegToAddr()
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430InstrInfo.cpp | 39 unsigned SrcReg, bool isKill, int FrameIdx, in storeRegToStackSlot()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcInstrInfo.cpp | 352 unsigned SrcReg, bool isKill, int FI, in storeRegToStackSlot()
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| /external/llvm/lib/CodeGen/ |
| D | MachineInstrBundle.cpp | 198 bool isKill = KilledUseSet.count(Reg); in finalizeBundle() local
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| D | TwoAddressInstructionPass.cpp | 861 bool isKill = MO.isKill() || in rescheduleMIBelowKill() local
993 bool isKill = MO.isKill() || (LIS && isPlainlyKilled(KillMI, MOReg, LIS)); in rescheduleKillAboveMI() local
1656 bool isKill = UseMO.isKill(); in eliminateRegSequence() local
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| D | MachineInstr.cpp | 129 bool isKill, bool isDead, bool isUndef, in ChangeToRegister()
1065 int MachineInstr::findRegisterUseOperandIdx(unsigned Reg, bool isKill, in findRegisterUseOperandIdx()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreInstrInfo.cpp | 370 unsigned SrcReg, bool isKill, in storeRegToStackSlot()
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| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| D | AMDGPUInstrInfo.cpp | 124 unsigned SrcReg, bool isKill, in storeRegToStackSlot()
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDGPUInstrInfo.cpp | 124 unsigned SrcReg, bool isKill, in storeRegToStackSlot()
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| /external/llvm/lib/Target/R600/ |
| D | AMDGPUInstrInfo.cpp | 108 unsigned SrcReg, bool isKill, in storeRegToStackSlot()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrInfo.cpp | 474 unsigned SrcReg, bool isKill, int FI, in storeRegToStackSlot()
510 bool isKill, in storeRegToAddr()
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| /external/llvm/include/llvm/CodeGen/ |
| D | MachineOperand.h | 294 bool isKill() const { in isKill() function
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| D | LiveInterval.h | 107 bool isKill() const { in isKill() function
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 773 unsigned SrcReg, bool isKill, in StoreRegToStackSlot()
852 unsigned SrcReg, bool isKill, int FrameIdx, in storeRegToStackSlot()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 347 bool isKill = Op.hasOneUse() && in AddRegisterOperand() local
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| /external/llvm/include/llvm/Target/ |
| D | TargetInstrInfo.h | 528 unsigned SrcReg, bool isKill, int FrameIndex, in storeRegToStackSlot()
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