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Searched defs:src1 (Results 1 – 10 of 10) sorted by relevance

/art/compiler/dex/quick/
Dmir_to_lir-inl.h89 inline LIR* Mir2Lir::NewLIR2(int opcode, int dest, int src1) { in NewLIR2()
109 inline LIR* Mir2Lir::NewLIR3(int opcode, int dest, int src1, int src2) { in NewLIR3()
119 inline LIR* Mir2Lir::NewLIR4(int opcode, int dest, int src1, int src2, int info) { in NewLIR4()
129 inline LIR* Mir2Lir::NewLIR5(int opcode, int dest, int src1, int src2, int info1, in NewLIR5()
Dcodegen_util.cc934 bool Mir2Lir::EvaluateBranch(Instruction::Code opcode, int32_t src1, int32_t src2) { in EvaluateBranch()
/art/runtime/arch/arm64/
Dmemcmp16_arm64.S28 #define src1 x0 macro
/art/compiler/dex/portable/
Dmir_to_gbc.cc314 ::llvm::Value* src1, ::llvm::Value* src2) { in ConvertCompare()
364 ::llvm::Value* src1, ::llvm::Value* src2) { in GenDivModOp()
387 ::llvm::Value* src1, ::llvm::Value* src2) { in GenArithOp()
/art/compiler/dex/
Dssa_transformation.cc438 void MIRGraph::ComputeSuccLineIn(ArenaBitVector* dest, const ArenaBitVector* src1, in ComputeSuccLineIn()
Dglobal_value_numbering_test.cc128 #define DEF_PHI2(bb, reg, src1, src2) \ argument
/art/compiler/dex/quick/mips/
Dint_mips.cc65 LIR* MipsMir2Lir::OpCmpBranch(ConditionCode cond, RegStorage src1, RegStorage src2, LIR* target) { in OpCmpBranch()
/art/compiler/dex/quick/arm/
Dint_arm.cc28 LIR* ArmMir2Lir::OpCmpBranch(ConditionCode cond, RegStorage src1, RegStorage src2, LIR* target) { in OpCmpBranch()
/art/compiler/dex/quick/arm64/
Dint_arm64.cc29 LIR* Arm64Mir2Lir::OpCmpBranch(ConditionCode cond, RegStorage src1, RegStorage src2, LIR* target) { in OpCmpBranch()
/art/compiler/dex/quick/x86/
Dint_x86.cc96 LIR* X86Mir2Lir::OpCmpBranch(ConditionCode cond, RegStorage src1, RegStorage src2, LIR* target) { in OpCmpBranch()