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Searched refs:AllocTypedTempWide (Results 1 – 6 of 6) sorted by relevance

/art/compiler/dex/quick/
Dmir_to_lir.cc93 wide ? AllocTypedTempWide(false, reg_class) : AllocTypedTemp(false, reg_class); in LoadArg()
100 RegStorage new_reg = AllocTypedTempWide(false, reg_class); in LoadArg()
121 RegStorage new_regs = AllocTypedTempWide(false, reg_class); in LoadArg()
150 RegStorage new_regs = AllocTypedTempWide(false, reg_class); in LoadArg()
249 r_result = wide ? AllocTypedTempWide(rl_dest.fp, reg_class) in GenSpecialIGet()
Dgen_loadstore.cc237 RegStorage new_regs = AllocTypedTempWide(rl_src.fp, op_kind); in LoadValueWide()
250 rl_src.reg = AllocTypedTempWide(rl_src.fp, op_kind); in LoadValueWide()
Dralloc_util.cc457 RegStorage Mir2Lir::AllocTypedTempWide(bool fp_hint, int reg_class, bool required) { in AllocTypedTempWide() function in art::Mir2Lir
1085 RegStorage new_regs = AllocTypedTempWide(loc.fp, reg_class); in EvalLocWide()
1100 loc.reg = AllocTypedTempWide(loc.fp, reg_class); in EvalLocWide()
Dmir_to_lir.h755 virtual RegStorage AllocTypedTempWide(bool fp_hint, int reg_class, bool required = true);
/art/compiler/dex/quick/x86/
Dint_x86.cc462 RegStorage tmp = AllocTypedTempWide(false, kCoreReg); in GenFusedLongCmpImmBranch()
500 RegStorage tmp = AllocTypedTempWide(false, kCoreReg); in GenFusedLongCmpImmBranch()
1819 RegStorage rs_temp = AllocTypedTempWide(false, kCoreReg); in GenDivRemLongLit()
Dutility_x86.cc611 RegStorage r_temp = AllocTypedTempWide(false, kCoreReg); in LoadConstantWide()