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Searched refs:IP (Results 1 – 6 of 6) sorted by relevance

/art/compiler/optimizing/
Dcode_generator_arm.cc247 blocked_registers[IP] = true; in SetupBlockedRegisters()
274 __ LoadFromOffset(kLoadWord, IP, TR, Thread::StackEndOffset<kArmWordSize>().Int32Value()); in GenerateFrameEntry()
275 __ cmp(SP, ShifterOperand(IP)); in GenerateFrameEntry()
278 __ AddConstant(IP, SP, -static_cast<int32_t>(GetStackOverflowReservedBytes(kArm))); in GenerateFrameEntry()
279 __ ldr(IP, Address(IP, 0)); in GenerateFrameEntry()
383 __ ldr(IP, Address(SP, source.GetStackIndex())); in Move32()
384 __ str(IP, Address(SP, destination.GetStackIndex())); in Move32()
447 __ ldr(IP, Address(SP, source.GetStackIndex())); in Move64()
448 __ str(IP, Address(SP, destination.GetStackIndex())); in Move64()
449 __ ldr(IP, Address(SP, source.GetHighStackIndex(kArmWordSize))); in Move64()
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/art/compiler/utils/arm/
Dassembler_arm32.cc1261 CHECK(rn != IP); in AddConstant()
1263 mvn(IP, shifter_op, cond); in AddConstant()
1264 add(rd, rn, ShifterOperand(IP), cond); in AddConstant()
1266 mvn(IP, shifter_op, cond); in AddConstant()
1267 sub(rd, rn, ShifterOperand(IP), cond); in AddConstant()
1269 movw(IP, Low16Bits(value), cond); in AddConstant()
1272 movt(IP, value_high, cond); in AddConstant()
1274 add(rd, rn, ShifterOperand(IP), cond); in AddConstant()
1288 CHECK(rn != IP); in AddConstantSetFlags()
1290 mvn(IP, shifter_op, cond); in AddConstantSetFlags()
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Dassembler_thumb2.cc2312 CHECK(rn != IP); in AddConstant()
2314 mvn(IP, shifter_op, cond); in AddConstant()
2315 add(rd, rn, ShifterOperand(IP), cond); in AddConstant()
2317 mvn(IP, shifter_op, cond); in AddConstant()
2318 sub(rd, rn, ShifterOperand(IP), cond); in AddConstant()
2320 movw(IP, Low16Bits(value), cond); in AddConstant()
2323 movt(IP, value_high, cond); in AddConstant()
2325 add(rd, rn, ShifterOperand(IP), cond); in AddConstant()
2339 CHECK(rn != IP); in AddConstantSetFlags()
2341 mvn(IP, shifter_op, cond); in AddConstantSetFlags()
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/art/compiler/jni/quick/arm/
Dcalling_convention_arm.cc27 return ArmManagedRegister::FromCoreRegister(IP); // R12 in InterproceduralScratchRegister()
31 return ArmManagedRegister::FromCoreRegister(IP); // R12 in InterproceduralScratchRegister()
/art/runtime/arch/arm/
Dregisters_arm.h45 IP = 12, enumerator
/art/compiler/trampolines/
Dtrampoline_compiler.cc40 __ LoadFromOffset(kLoadWord, IP, R0, JNIEnvExt::SelfOffset().Int32Value()); in CreateTrampoline()
41 __ LoadFromOffset(kLoadWord, PC, IP, offset.Int32Value()); in CreateTrampoline()