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Searched refs:IsFloat (Results 1 – 24 of 24) sorted by relevance

/art/compiler/dex/quick/x86/
Dutility_x86.cc32 DCHECK(r_dest.IsFloat() || r_src.IsFloat()); in OpFpRegCopy()
83 if (r_dest.IsFloat()) { in LoadConstantNoClobber()
99 if (r_dest_save.IsFloat()) { in LoadConstantNoClobber()
136 DCHECK(!r_dest_src1.IsFloat()); in OpRegImm()
252 DCHECK(!r_base.IsFloat()); in OpMovRegMem()
257 CHECK(!r_dest.IsFloat()); in OpMovRegMem()
261 CHECK(!r_dest.IsFloat()); in OpMovRegMem()
265 CHECK(!r_dest.IsFloat()); in OpMovRegMem()
269 CHECK(r_dest.IsFloat()); in OpMovRegMem()
273 CHECK(r_dest.IsFloat()); in OpMovRegMem()
[all …]
Dint_x86.cc131 if (r_dest.IsFloat() || r_src.IsFloat()) in OpRegCopyNoInsert()
150 bool dest_fp = r_dest.IsFloat(); in OpRegCopyWide()
151 bool src_fp = r_src.IsFloat(); in OpRegCopyWide()
213 DCHECK(!left_op.IsFloat() && !right_op.IsFloat() && !rs_dest.IsFloat()); in GenSelectConst32()
2401 DCHECK(in_mem || !loc.reg.IsFloat()); in GetOpcode()
2498 DCHECK(!rl_result.reg.IsFloat()); in GenLongImm()
2539 DCHECK(!rl_result.reg.IsFloat()); in GenLongImm()
2564 rl_src1.location == kLocPhysReg && !rl_dest.reg.IsFloat()) { in GenLongLongImm()
2591 rl_dest.reg.GetHighReg() == rl_src1.reg.GetHighReg() && !rl_dest.reg.IsFloat()) { in GenLongLongImm()
2825 } else if (!rl_result.reg.IsFloat()) { in GenArithOpInt()
[all …]
Dfp_x86.cc665 if (rl_src.location == kLocPhysReg && rl_src.reg.IsFloat()) { in GenInlinedAbsDouble()
Dtarget_x86.cc246 ((reg.IsFloat() || reg.StorageSize() > 8) ? kX86FPReg0 : 0) + reg.GetRegNum()); in GetRegMaskCommon()
372 if (RegStorage::IsFloat(operand)) { in BuildInsnString()
Dassemble_x86.cc1071 DCHECK(!RegStorage::IsFloat(raw_reg)); in EmitOpRegOpcode()
1216 DCHECK(!RegStorage::IsFloat(raw_reg)); in EmitRegMemImm()
/art/runtime/verifier/
Dreg_type_test.cc95 EXPECT_FALSE(bool_reg_type.IsFloat()); in TEST_F()
127 EXPECT_FALSE(byte_reg_type.IsFloat()); in TEST_F()
159 EXPECT_FALSE(char_reg_type.IsFloat()); in TEST_F()
191 EXPECT_FALSE(short_reg_type.IsFloat()); in TEST_F()
223 EXPECT_FALSE(int_reg_type.IsFloat()); in TEST_F()
255 EXPECT_FALSE(long_reg_type.IsFloat()); in TEST_F()
287 EXPECT_TRUE(float_reg_type.IsFloat()); in TEST_F()
319 EXPECT_FALSE(double_reg_type.IsFloat()); in TEST_F()
487 EXPECT_TRUE(merged.IsFloat()); in TEST_F()
492 EXPECT_TRUE(merged.IsFloat()); in TEST_F()
[all …]
Dreg_type.h54 virtual bool IsFloat() const { return false; } in IsFloat() function
150 return IsChar() || IsInteger() || IsFloat() || IsConstant() || IsByte() || IsShort() || in IsCategory1Types()
180 return IsFloat() || IsConstant(); in IsFloatTypes()
469 bool IsFloat() const { in IsFloat() function
Dreg_type.cc566 } else if (IsFloat()) { in GetPrimitiveType()
724 } else if (lhs.IsFloat()) { in AssignableFrom()
Dmethod_verifier.cc3556 !((insn_type.IsInteger() && component_type.IsFloat()) || in VerifyAGet()
3584 } else if (target_type.IsFloat()) { in VerifyPrimitivePut()
3826 (field_type->IsFloat() && insn_type.IsInteger()) || in VerifyISFieldAccess()
3940 } else if (field_type->IsFloat()) { in VerifyQuickFieldAccess()
3983 (field_type->IsFloat() && insn_type.IsIntegralTypes()) || in VerifyQuickFieldAccess()
4152 } else if (type.IsFloat()) { in DescribeVRegs()
/art/compiler/dex/quick/arm/
Dutility_arm.cc177 if (r_dest.IsFloat()) { in LoadConstantNoClobber()
645 if (r_dest.IsFloat()) { in LoadConstantWide()
675 if (r_dest.IsFloat()) { in LoadConstantWide()
700 if (r_dest.IsFloat()) { in LoadBaseIndexed()
766 if (r_src.IsFloat()) { in StoreBaseIndexed()
867 if (r_dest.IsFloat()) { in LoadBaseDispBody()
883 if (r_dest.IsFloat()) { in LoadBaseDispBody()
951 DCHECK(!r_dest.IsFloat()); in LoadBaseDispBody()
977 DCHECK(!r_dest.IsFloat()); // See RegClassForFieldLoadSave(). in LoadBaseDisp()
1008 if (r_src.IsFloat()) { in StoreBaseDispBody()
[all …]
Dfp_arm.cc308 DCHECK(!rl_result.reg.IsFloat()); in GenCmpFP()
341 if ((rl_src.location == kLocPhysReg && !rl_src.reg.IsFloat()) || in RegClassForAbsFP()
342 (rl_dest.location == kLocPhysReg && !rl_dest.reg.IsFloat())) { in RegClassForAbsFP()
Dint_arm.cc411 if (r_dest.IsFloat() || r_src.IsFloat()) in OpRegCopyNoInsert()
437 bool dest_fp = r_dest.IsFloat(); in OpRegCopyWide()
438 bool src_fp = r_src.IsFloat(); in OpRegCopyWide()
826 bool expected_is_core_reg = rl_src_expected.location == kLocPhysReg && !expected_reg.IsFloat(); in GenInlinedCas()
827 bool new_value_is_core_reg = rl_src_new_value.location == kLocPhysReg && !new_val_reg.IsFloat(); in GenInlinedCas()
/art/compiler/dex/quick/mips/
Dutility_mips.cc83 int is_fp_reg = r_dest.IsFloat(); in LoadConstantNoClobber()
363 if (r_dest.IsFloat()) { in LoadBaseIndexed()
415 if (r_src.IsFloat()) { in StoreBaseIndexed()
480 if (r_dest.IsFloat()) { in LoadBaseDispBody()
493 if (r_dest.IsFloat()) { in LoadBaseDispBody()
591 if (r_src.IsFloat()) { in StoreBaseDispBody()
604 if (r_src.IsFloat()) { in StoreBaseDispBody()
Dint_mips.cc171 if (r_dest.IsFloat() || r_src.IsFloat()) in OpRegCopyNoInsert()
190 bool dest_fp = r_dest.IsFloat(); in OpRegCopyWide()
191 bool src_fp = r_src.IsFloat(); in OpRegCopyWide()
Dtarget_mips.cc496 DCHECK(!r_dest.IsFloat()); // See RegClassForFieldLoadStore(). in GenAtomic64Load()
510 DCHECK(!r_src.IsFloat()); // See RegClassForFieldLoadStore(). in GenAtomic64Store()
/art/compiler/dex/
Dreg_storage.h165 constexpr bool IsFloat() const { in IsFloat() function
183 static constexpr bool IsFloat(uint16_t reg) { in IsFloat() function
/art/compiler/dex/quick/arm64/
Dutility_arm64.cc395 if (r_dest.IsFloat()) { in LoadConstantNoClobber()
457 if (r_dest.IsFloat()) { in LoadConstantWide()
1039 if (r_dest.IsFloat()) { in LoadBaseIndexed()
1127 if (r_src.IsFloat()) { in StoreBaseIndexed()
1210 if (r_dest.IsFloat()) { in LoadBaseDispBody()
1224 if (r_dest.IsFloat()) { in LoadBaseDispBody()
1307 if (r_src.IsFloat()) { in StoreBaseDispBody()
1321 if (r_src.IsFloat()) { in StoreBaseDispBody()
Dfp_arm64.cc294 DCHECK(!rl_result.reg.IsFloat()); in GenCmpFP()
327 if ((rl_src.location == kLocPhysReg && !rl_src.reg.IsFloat()) || in RegClassForAbsFP()
328 (rl_dest.location == kLocPhysReg && !rl_dest.reg.IsFloat())) { in RegClassForAbsFP()
Dassemble_arm64.cc729 if (!reg.IsFloat()) { in EncodeLIRs()
735 if (reg.IsFloat()) { in EncodeLIRs()
Dint_arm64.cc302 bool dest_is_fp = r_dest.IsFloat(); in OpRegCopyNoInsert()
303 bool src_is_fp = r_src.IsFloat(); in OpRegCopyNoInsert()
Dtarget_arm64.cc155 (reg.IsFloat() ? kArm64FPReg0 : 0) + reg.GetRegNum()); in GetRegMaskCommon()
/art/compiler/dex/quick/
Dgen_loadstore.cc391 DCHECK(!loc.reg.IsFloat()); in ForceTemp()
408 DCHECK(!loc.reg.IsFloat()); in ForceTempWide()
Dralloc_util.cc148 info->GetReg().GetReg(), info->GetReg().GetRegNum(), info->GetReg().IsFloat() ? 'f' : 'c', in DumpRegPool()
504 if (wide && !reg.IsFloat() && !cu_->target64) { in AllocLiveReg()
815 return !reg.IsFloat(); in RegClassMatches()
817 return reg.IsFloat(); in RegClassMatches()
Dmir_to_lir.cc127 DCHECK(!reg_arg_low.IsFloat()); in LoadArg()
1298 if (!rs.IsFloat()) { in CheckRegStorageImpl()
1306 if (rs.IsFloat()) { in CheckRegStorageImpl()