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Searched refs:MIR (Results 1 – 25 of 41) sorted by relevance

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/art/compiler/dex/
Dmir_graph.h268 struct MIR { struct
352 MIR* next; argument
358 MIR* throw_insn; argument
371 explicit MIR():offset(0), optimization_flags(0), m_unit_index(0), bb(NullBasicBlockId), in MIR() function
380 MIR* Copy(CompilationUnit *c_unit); argument
381 MIR* Copy(MIRGraph* mir_Graph);
384 return arena->Alloc(sizeof(MIR), kArenaAllocMIR); in new() argument
409 MIR* first_mir_insn; argument
410 MIR* last_mir_insn;
418 void AppendMIR(MIR* mir);
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Dmir_graph.cc140 int MIRGraph::ParseInsn(const uint16_t* code_ptr, MIR::DecodedInstruction* decoded_instruction) { in ParseInsn()
158 MIR* insn = orig_block->first_mir_insn; in SplitBlock()
159 MIR* prev = NULL; in SplitBlock()
234 !MIR::DecodedInstruction::IsPseudoMirOp(insn->dalvikInsn.opcode)); in SplitBlock()
236 MIR* p = insn; in SplitBlock()
249 if ((opcode == kMirOpCheck) || !MIR::DecodedInstruction::IsPseudoMirOp(opcode)) { in SplitBlock()
399 BasicBlock* MIRGraph::ProcessCanBranch(BasicBlock* cur_block, MIR* insn, DexOffset cur_offset, in ProcessCanBranch()
466 BasicBlock* MIRGraph::ProcessCanSwitch(BasicBlock* cur_block, MIR* insn, DexOffset cur_offset, in ProcessCanSwitch()
542 BasicBlock* MIRGraph::ProcessCanThrow(BasicBlock* cur_block, MIR* insn, DexOffset cur_offset, in ProcessCanThrow()
639 MIR* new_insn = NewMIR(); in ProcessCanThrow()
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Dlocal_value_numbering.h77 uint16_t GetValueNumber(MIR* mir);
295 uint16_t MarkNonAliasingNonNull(MIR* mir);
299 void HandleNullCheck(MIR* mir, uint16_t reg);
300 void HandleRangeCheck(MIR* mir, uint16_t array, uint16_t index);
301 void HandlePutObject(MIR* mir);
303 uint16_t HandlePhi(MIR* mir);
304 uint16_t HandleAGet(MIR* mir, uint16_t opcode);
305 void HandleAPut(MIR* mir, uint16_t opcode);
306 uint16_t HandleIGet(MIR* mir, uint16_t opcode);
307 void HandleIPut(MIR* mir, uint16_t opcode);
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Dmir_optimization.cc46 MIR* mir; in DoConstantPropagation()
56 MIR::DecodedInstruction* d_insn = &mir->dalvikInsn; in DoConstantPropagation()
107 MIR* MIRGraph::AdvanceMIR(BasicBlock** p_bb, MIR* mir) { in AdvanceMIR()
131 MIR* MIRGraph::FindMoveResult(BasicBlock* bb, MIR* mir) { in FindMoveResult()
141 if (MIR::DecodedInstruction::IsPseudoMirOp(mir->dalvikInsn.opcode)) { in FindMoveResult()
173 static MIR* FindPhi(BasicBlock* bb, int ssa_name) { in FindPhi()
174 for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) { in FindPhi()
186 static SelectInstructionKind SelectKind(MIR* mir) { in SelectKind()
336 for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) { in BasicBlockOpt()
354 MIR* mir_next = mir->next; in BasicBlockOpt()
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Dmir_dataflow.cc914 const MIR::DecodedInstruction& d_insn) { in HandleExtended()
927 MIR* mir; in FindLocalLiveIn()
941 MIR::DecodedInstruction* d_insn = &mir->dalvikInsn; in FindLocalLiveIn()
1017 void MIRGraph::AllocateSSAUseData(MIR *mir, int num_uses) { in AllocateSSAUseData()
1027 void MIRGraph::AllocateSSADefData(MIR *mir, int num_defs) { in AllocateSSADefData()
1039 void MIRGraph::DataFlowSSAFormat35C(MIR* mir) { in DataFlowSSAFormat35C()
1040 MIR::DecodedInstruction* d_insn = &mir->dalvikInsn; in DataFlowSSAFormat35C()
1052 void MIRGraph::DataFlowSSAFormat3RC(MIR* mir) { in DataFlowSSAFormat3RC()
1053 MIR::DecodedInstruction* d_insn = &mir->dalvikInsn; in DataFlowSSAFormat3RC()
1064 void MIRGraph::DataFlowSSAFormatExtended(MIR* mir) { in DataFlowSSAFormatExtended()
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Dpost_opt_passes.cc59 MIR* mir = bb->first_mir_insn; in Worker()
62 MIR* next = mir->next; in Worker()
Dmir_optimization_test.cc158 mirs_ = reinterpret_cast<MIR*>(cu_.arena.Alloc(sizeof(MIR) * count, kArenaAllocMIR)); in DoPrepareMIRs()
162 MIR* mir = &mirs_[i]; in DoPrepareMIRs()
218 MIR* mirs_;
Dlocal_value_numbering.cc464 const MIR* mir = fall_through_bb->first_mir_insn; in PruneNonAliasingRefsForCatch()
933 uint16_t LocalValueNumbering::MarkNonAliasingNonNull(MIR* mir) { in MarkNonAliasingNonNull()
975 void LocalValueNumbering::HandleNullCheck(MIR* mir, uint16_t reg) { in HandleNullCheck()
989 void LocalValueNumbering::HandleRangeCheck(MIR* mir, uint16_t array, uint16_t index) { in HandleRangeCheck()
1005 void LocalValueNumbering::HandlePutObject(MIR* mir) { in HandlePutObject()
1019 uint16_t LocalValueNumbering::HandlePhi(MIR* mir) { in HandlePhi()
1080 uint16_t LocalValueNumbering::HandleAGet(MIR* mir, uint16_t opcode) { in HandleAGet()
1105 void LocalValueNumbering::HandleAPut(MIR* mir, uint16_t opcode) { in HandleAPut()
1143 uint16_t LocalValueNumbering::HandleIGet(MIR* mir, uint16_t opcode) { in HandleIGet()
1178 void LocalValueNumbering::HandleIPut(MIR* mir, uint16_t opcode) { in HandleIPut()
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Dmir_analysis.cc904 for (MIR* mir = tbb->first_mir_insn; mir != NULL; mir = mir->next) { in AnalyzeBlock()
905 if (MIR::DecodedInstruction::IsPseudoMirOp(mir->dalvikInsn.opcode)) { in AnalyzeBlock()
1124 for (MIR* mir = bb->first_mir_insn; mir != nullptr; mir = mir->next) { in DoCacheFieldLoweringInfo()
1240 for (MIR* mir = bb->first_mir_insn; mir != nullptr; mir = mir->next) { in DoCacheMethodLoweringInfo()
Dvreg_analysis.cc124 bool MIRGraph::InferTypeAndSize(BasicBlock* bb, MIR* mir, bool changed) { in InferTypeAndSize()
254 int flags = MIR::DecodedInstruction::IsPseudoMirOp(opcode) ? in InferTypeAndSize()
263 MIR* move_result_mir = FindMoveResult(bb, mir); in InferTypeAndSize()
Dlocal_value_numbering_test.cc134 mirs_ = reinterpret_cast<MIR*>(cu_.arena.Alloc(sizeof(MIR) * count, kArenaAllocMIR)); in DoPrepareMIRs()
138 MIR* mir = &mirs_[i]; in DoPrepareMIRs()
206 MIR* mirs_;
/art/compiler/dex/quick/
Ddex_file_method_inliner.h36 struct MIR;
90 bool GenInline(MIRGraph* mir_graph, BasicBlock* bb, MIR* invoke, uint32_t method_idx)
313 static bool GenInlineConst(MIRGraph* mir_graph, BasicBlock* bb, MIR* invoke,
314 MIR* move_result, const InlineMethod& method);
315 static bool GenInlineReturnArg(MIRGraph* mir_graph, BasicBlock* bb, MIR* invoke,
316 MIR* move_result, const InlineMethod& method);
317 static bool GenInlineIGet(MIRGraph* mir_graph, BasicBlock* bb, MIR* invoke,
318 MIR* move_result, const InlineMethod& method, uint32_t method_idx);
319 static bool GenInlineIPut(MIRGraph* mir_graph, BasicBlock* bb, MIR* invoke,
320 MIR* move_result, const InlineMethod& method, uint32_t method_idx);
Ddex_file_method_inliner.cc102 MIR* AllocReplacementMIR(MIRGraph* mir_graph, MIR* invoke, MIR* move_return) { in AllocReplacementMIR()
103 MIR* insn = mir_graph->NewMIR(); in AllocReplacementMIR()
109 uint32_t GetInvokeReg(MIR* invoke, uint32_t arg) { in GetInvokeReg()
111 DCHECK(!MIR::DecodedInstruction::IsPseudoMirOp(invoke->dalvikInsn.opcode)); in GetInvokeReg()
120 bool WideArgIsInConsecutiveDalvikRegs(MIR* invoke, uint32_t arg) { in WideArgIsInConsecutiveDalvikRegs()
122 DCHECK(!MIR::DecodedInstruction::IsPseudoMirOp(invoke->dalvikInsn.opcode)); in WideArgIsInConsecutiveDalvikRegs()
529 bool DexFileMethodInliner::GenInline(MIRGraph* mir_graph, BasicBlock* bb, MIR* invoke, in GenInline()
541 MIR* move_result = nullptr; in GenInline()
711 bool DexFileMethodInliner::GenInlineConst(MIRGraph* mir_graph, BasicBlock* bb, MIR* invoke, in GenInlineConst()
712 MIR* move_result, const InlineMethod& method) { in GenInlineConst()
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Dmir_to_lir.h145 struct MIR;
851 void GenSput(MIR* mir, RegLocation rl_src,
853 void GenSget(MIR* mir, RegLocation rl_dest,
855 void GenIGet(MIR* mir, int opt_flags, OpSize size,
857 void GenIPut(MIR* mir, int opt_flags, OpSize size,
1086 void CompileDalvikInstruction(MIR* mir, BasicBlock* bb, LIR* label_list);
1087 virtual void HandleExtendedMethodMIR(BasicBlock* bb, MIR* mir);
1323 virtual void GenFusedFPCmpBranch(BasicBlock* bb, MIR* mir, bool gt_bias, bool is_double) = 0;
1324 virtual void GenFusedLongCmpBranch(BasicBlock* bb, MIR* mir) = 0;
1332 virtual void GenMachineSpecificExtendedMethodMIR(BasicBlock* bb, MIR* mir);
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Dmir_to_lir.cc228 bool Mir2Lir::GenSpecialIGet(MIR* mir, const InlineMethod& special) { in GenSpecialIGet()
268 bool Mir2Lir::GenSpecialIPut(MIR* mir, const InlineMethod& special) { in GenSpecialIPut()
303 bool Mir2Lir::GenSpecialIdentity(MIR* mir, const InlineMethod& special) { in GenSpecialIdentity()
319 bool Mir2Lir::GenSpecialCase(BasicBlock* bb, MIR* mir, const InlineMethod& special) { in GenSpecialCase()
322 MIR* return_mir = nullptr; in GenSpecialCase()
389 void Mir2Lir::CompileDalvikInstruction(MIR* mir, BasicBlock* bb, LIR* label_list) { in CompileDalvikInstruction()
1064 void Mir2Lir::HandleExtendedMethodMIR(BasicBlock* bb, MIR* mir) { in HandleExtendedMethodMIR()
1106 void Mir2Lir::GenPrintLabel(MIR* mir) { in GenPrintLabel()
1118 MIR* mir; in MethodBlockCodeGen()
1180 MIR* work_half = mir->meta.throw_insn; in MethodBlockCodeGen()
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/art/compiler/dex/quick/x86/
Dcodegen_x86.h237 void GenFusedFPCmpBranch(BasicBlock* bb, MIR* mir, bool gt_bias, bool is_double) OVERRIDE;
238 void GenFusedLongCmpBranch(BasicBlock* bb, MIR* mir) OVERRIDE;
239 void GenSelect(BasicBlock* bb, MIR* mir) OVERRIDE;
249 void GenLargePackedSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src) OVERRIDE;
250 void GenLargeSparseSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src) OVERRIDE;
482 void GenMultiplyVectorSignedByte(BasicBlock *bb, MIR *mir);
483 void GenShiftByteVector(BasicBlock *bb, MIR *mir);
486 void AppendOpcodeWithConst(X86OpCode opcode, int reg, MIR* mir);
529 void ReserveVectorRegisters(MIR* mir);
544 void GenConst128(BasicBlock* bb, MIR* mir);
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Dtarget_x86.cc1685 void X86Mir2Lir::GenMachineSpecificExtendedMethodMIR(BasicBlock* bb, MIR* mir) { in GenMachineSpecificExtendedMethodMIR()
1740 void X86Mir2Lir::ReserveVectorRegisters(MIR* mir) { in ReserveVectorRegisters()
1785 void X86Mir2Lir::GenConst128(BasicBlock* bb, MIR* mir) { in GenConst128()
1803 void X86Mir2Lir::AppendOpcodeWithConst(X86OpCode opcode, int reg, MIR* mir) { in AppendOpcodeWithConst()
1828 void X86Mir2Lir::GenMoveVector(BasicBlock *bb, MIR *mir) { in GenMoveVector()
1836 void X86Mir2Lir::GenMultiplyVectorSignedByte(BasicBlock *bb, MIR *mir) { in GenMultiplyVectorSignedByte()
1878 void X86Mir2Lir::GenMultiplyVector(BasicBlock *bb, MIR *mir) { in GenMultiplyVector()
1908 void X86Mir2Lir::GenAddVector(BasicBlock *bb, MIR *mir) { in GenAddVector()
1939 void X86Mir2Lir::GenSubtractVector(BasicBlock *bb, MIR *mir) { in GenSubtractVector()
1970 void X86Mir2Lir::GenShiftByteVector(BasicBlock *bb, MIR *mir) { in GenShiftByteVector()
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Dcall_x86.cc30 void X86Mir2Lir::GenLargeSparseSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src) { in GenLargeSparseSwitch()
63 void X86Mir2Lir::GenLargePackedSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src) { in GenLargePackedSwitch()
Dutility_x86.cc928 for (MIR *mir = bb->first_mir_insn; mir != NULL; mir = mir->next) { in AnalyzeBB()
930 if (MIR::DecodedInstruction::IsPseudoMirOp(opcode)) { in AnalyzeBB()
939 void X86Mir2Lir::AnalyzeExtendedMIR(int opcode, BasicBlock * bb, MIR *mir) { in AnalyzeExtendedMIR()
955 void X86Mir2Lir::AnalyzeMIR(int opcode, BasicBlock * bb, MIR *mir) { in AnalyzeMIR()
991 void X86Mir2Lir::AnalyzeFPInstruction(int opcode, BasicBlock * bb, MIR *mir) { in AnalyzeFPInstruction()
1053 void X86Mir2Lir::AnalyzeInvokeStatic(int opcode, BasicBlock * bb, MIR *mir) { in AnalyzeInvokeStatic()
/art/compiler/dex/portable/
Dmir_to_gbc.h40 struct MIR;
117 void ConvertCompareAndBranch(BasicBlock* bb, MIR* mir, ConditionCode cc,
119 void ConvertCompareZeroAndBranch(BasicBlock* bb, MIR* mir, ConditionCode cc,
135 void ConvertInvoke(BasicBlock* bb, MIR* mir, InvokeType invoke_type,
168 bool ConvertMIRNode(MIR* mir, BasicBlock* bb, ::llvm::BasicBlock* llvm_bb);
172 void ConvertExtendedMIR(BasicBlock* bb, MIR* mir, ::llvm::BasicBlock* llvm_bb);
/art/compiler/dex/quick/mips/
Dcodegen_mips.h119 void GenFusedFPCmpBranch(BasicBlock* bb, MIR* mir, bool gt_bias, bool is_double);
120 void GenFusedLongCmpBranch(BasicBlock* bb, MIR* mir);
121 void GenSelect(BasicBlock* bb, MIR* mir);
131 void GenLargePackedSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src);
132 void GenLargeSparseSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src);
133 bool GenSpecialCase(BasicBlock* bb, MIR* mir, const InlineMethod& special);
Dcall_mips.cc27 bool MipsMir2Lir::GenSpecialCase(BasicBlock* bb, MIR* mir, in GenSpecialCase()
64 void MipsMir2Lir::GenLargeSparseSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src) { in GenLargeSparseSwitch()
141 void MipsMir2Lir::GenLargePackedSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src) { in GenLargePackedSwitch()
/art/compiler/dex/quick/arm/
Dcodegen_arm.h120 void GenFusedFPCmpBranch(BasicBlock* bb, MIR* mir, bool gt_bias, bool is_double);
121 void GenFusedLongCmpBranch(BasicBlock* bb, MIR* mir);
122 void GenSelect(BasicBlock* bb, MIR* mir);
134 void GenLargePackedSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src);
135 void GenLargeSparseSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src);
/art/compiler/dex/quick/arm64/
Dcodegen_arm64.h185 void GenFusedFPCmpBranch(BasicBlock* bb, MIR* mir, bool gt_bias, bool is_double) OVERRIDE;
186 void GenFusedLongCmpBranch(BasicBlock* bb, MIR* mir) OVERRIDE;
187 void GenSelect(BasicBlock* bb, MIR* mir) OVERRIDE;
200 void GenLargePackedSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src) OVERRIDE;
201 void GenLargeSparseSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src) OVERRIDE;
Dcall_arm64.cc46 void Arm64Mir2Lir::GenLargeSparseSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src) { in GenLargeSparseSwitch()
98 void Arm64Mir2Lir::GenLargePackedSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src) { in GenLargePackedSwitch()

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