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Searched refs:R0 (Results 1 – 13 of 13) sorted by relevance

/art/compiler/utils/
Dassembler_thumb_test.cc235 __ mov(R0, ShifterOperand(R1)); in TEST()
238 __ mov(R0, ShifterOperand(1)); in TEST()
253 __ mov(R0, ShifterOperand(R1)); in TEST()
267 __ mov(R0, ShifterOperand(R1)); in TEST()
268 __ add(R0, R1, ShifterOperand(R2)); in TEST()
269 __ add(R0, R1, ShifterOperand()); in TEST()
282 __ mov(R0, ShifterOperand(R1)); in TEST()
283 __ mvn(R0, ShifterOperand(R1)); in TEST()
286 __ add(R0, R1, ShifterOperand(R2)); in TEST()
287 __ sub(R0, R1, ShifterOperand(R2)); in TEST()
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/art/compiler/jni/quick/arm/
Dcalling_convention_arm.cc36 return ArmManagedRegister::FromCoreRegister(R0); in ReturnRegisterForShorty()
44 return ArmManagedRegister::FromCoreRegister(R0); in ReturnRegisterForShorty()
57 return ArmManagedRegister::FromCoreRegister(R0); in IntReturnRegister()
63 return ArmManagedRegister::FromCoreRegister(R0); in MethodRegister()
183 R0, R1, R2, R3
/art/compiler/utils/arm/
Dmanaged_register_arm_test.cc31 ArmManagedRegister reg = ArmManagedRegister::FromCoreRegister(R0); in TEST()
37 EXPECT_EQ(R0, reg.AsCoreRegister()); in TEST()
235 EXPECT_EQ(R0, reg.AsRegisterPairLow()); in TEST()
237 EXPECT_TRUE(reg.Equals(ArmManagedRegister::FromCoreRegisterPair(R0))); in TEST()
292 EXPECT_TRUE(!no_reg.Equals(ArmManagedRegister::FromCoreRegister(R0))); in TEST()
298 ArmManagedRegister reg_R0 = ArmManagedRegister::FromCoreRegister(R0); in TEST()
300 EXPECT_TRUE(reg_R0.Equals(ArmManagedRegister::FromCoreRegister(R0))); in TEST()
308 EXPECT_TRUE(!reg_R1.Equals(ArmManagedRegister::FromCoreRegister(R0))); in TEST()
318 EXPECT_TRUE(!reg_R8.Equals(ArmManagedRegister::FromCoreRegister(R0))); in TEST()
328 EXPECT_TRUE(!reg_S0.Equals(ArmManagedRegister::FromCoreRegister(R0))); in TEST()
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Dassembler_thumb2.cc96 EmitDataProcessing(cond, TST, 1, rn, R0, so); in tst()
102 EmitDataProcessing(cond, TEQ, 1, rn, R0, so); in teq()
107 EmitDataProcessing(cond, CMP, 1, rn, R0, so); in cmp()
112 EmitDataProcessing(cond, CMN, 1, rn, R0, so); in cmn()
129 EmitDataProcessing(cond, MOV, 0, R0, rd, so); in mov()
134 EmitDataProcessing(cond, MOV, 1, R0, rd, so); in movs()
145 EmitDataProcessing(cond, MVN, 0, R0, rd, so); in mvn()
150 EmitDataProcessing(cond, MVN, 1, R0, rd, so); in mvns()
591 EmitDataProcessing(AL, TST, 1, PC, R0, ShifterOperand(0)); in MarkExceptionHandler()
991 rn = R0; in Emit16BitAddSub()
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Dassembler_arm32.cc94 EmitType01(cond, so.type(), TST, 1, rn, R0, so); in tst()
100 EmitType01(cond, so.type(), TEQ, 1, rn, R0, so); in teq()
105 EmitType01(cond, so.type(), CMP, 1, rn, R0, so); in cmp()
110 EmitType01(cond, so.type(), CMN, 1, rn, R0, so); in cmn()
127 EmitType01(cond, so.type(), MOV, 0, R0, rd, so); in mov()
132 EmitType01(cond, so.type(), MOV, 1, R0, rd, so); in movs()
143 EmitType01(cond, so.type(), MVN, 0, R0, rd, so); in mvn()
148 EmitType01(cond, so.type(), MVN, 1, R0, rd, so); in mvns()
154 EmitMulOp(cond, 0, R0, rd, rn, rm); in mul()
500 EmitType01(AL, 1, TST, 1, PC, R0, ShifterOperand(0)); in MarkExceptionHandler()
Dassembler_arm.cc39 if (rhs >= R0 && rhs <= PC) { in operator <<()
399 CHECK_EQ(R0, method_reg.AsArm().AsCoreRegister()); in BuildFrame()
417 StoreToOffset(kStoreWord, R0, SP, 0); in BuildFrame()
831 __ mov(R0, ShifterOperand(scratch_.AsCoreRegister())); in Emit()
Dassembler_thumb2.h508 cond_(cond), rn_(R0) { in assembler_()
525 target_(target), cond_(cond), rn_(R0) { in assembler_()
Dassembler_arm.h197 Address(Register rn, int32_t offset = 0, Mode am = Offset) : rn_(rn), rm_(R0), in rn_()
215 rn_(PC), rm_(R0), offset_(offset), in Address()
/art/runtime/arch/arm/
Dregisters_arm.cc29 if (rhs >= R0 && rhs <= PC) { in operator <<()
Dregisters_arm.h27 R0 = 0, enumerator
Dcontext_arm.cc96 gprs_[R0] = const_cast<uint32_t*>(&gZero); in SmashCallerSaves()
/art/compiler/trampolines/
Dtrampoline_compiler.cc37 __ LoadFromOffset(kLoadWord, PC, R0, offset.Int32Value()); in CreateTrampoline()
40 __ LoadFromOffset(kLoadWord, IP, R0, JNIEnvExt::SelfOffset().Int32Value()); in CreateTrampoline()
/art/compiler/optimizing/
Dcode_generator_arm.cc46 static constexpr Register kRuntimeParameterCoreRegisters[] = { R0, R1, R2 };
289 __ str(R0, Address(SP, 0)); in GenerateFrameEntry()
424 __ ldr(R0, Address(SP, source.GetHighStackIndex(kArmWordSize))); in Move64()
425 __ str(R0, Address(SP, calling_convention.GetStackOffsetOf(argument_index + 1))); in Move64()
442 __ ldr(R0, in Move64()
444 __ str(R0, Address(SP, destination.GetHighStackIndex(kArmWordSize))); in Move64()
758 locations->SetInAt(0, ArmCoreLocation(R0)); in VisitReturn()
782 DCHECK_EQ(ret->GetLocations()->InAt(0).AsArm().AsCoreRegister(), R0); in VisitReturn()
799 locations->AddTemp(ArmCoreLocation(R0)); in VisitInvokeStatic()
814 locations->SetOut(ArmCoreLocation(R0)); in VisitInvokeStatic()
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