Searched refs:R7 (Results 1 – 5 of 5) sorted by relevance
284 EXPECT_EQ(R7, reg.AsRegisterPairHigh()); in TEST()462 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromCoreRegister(R7))); in TEST()484 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromCoreRegister(R7))); in TEST()503 reg = ArmManagedRegister::FromCoreRegister(R7); in TEST()506 EXPECT_TRUE(reg.Overlaps(ArmManagedRegister::FromCoreRegister(R7))); in TEST()528 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromCoreRegister(R7))); in TEST()550 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromCoreRegister(R7))); in TEST()572 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromCoreRegister(R7))); in TEST()594 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromCoreRegister(R7))); in TEST()616 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromCoreRegister(R7))); in TEST()[all …]
127 callee_save_regs_.push_back(ArmManagedRegister::FromCoreRegister(R7)); in ArmJniCallingConvention()136 result = 1 << R5 | 1 << R6 | 1 << R7 | 1 << R8 | 1 << R10 | 1 << R11 | 1 << LR; in CoreSpillMask()
34 R7 = 7, enumerator
29 (1 << art::arm::R5) | (1 << art::arm::R6) | (1 << art::arm::R7) | (1 << art::arm::R8) |
284 core_spill_mask_ |= (1 << LR | 1 << R6 | 1 << R7); in GenerateFrameEntry()285 __ PushList(1 << LR | 1 << R6 | 1 << R7); in GenerateFrameEntry()294 __ PopList(1 << PC | 1 << R6 | 1 << R7); in GenerateFrameExit()