Searched refs:REG_USE2 (Results 1 – 5 of 5) sorted by relevance
| /art/compiler/dex/quick/ |
| D | mir_to_lir.h | 79 #define REG_USE2 (1ULL << kRegUse2) macro
118 #define REG_DEF01_USE2 (REG_DEF0 | REG_DEF1 | REG_USE2)
124 #define REG_DEF0_USE2 (REG_DEF0 | REG_USE2)
128 #define REG_USE012 (REG_USE01 | REG_USE2)
131 #define REG_USE02 (REG_USE0 | REG_USE2)
132 #define REG_USE12 (REG_USE1 | REG_USE2)
133 #define REG_USE23 (REG_USE2 | REG_USE3)
134 #define REG_USE123 (REG_USE1 | REG_USE2 | REG_USE3)
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| D | mir_to_lir-inl.h | 231 if (flags & REG_USE2) { in SetupResourceMasks()
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| /art/compiler/dex/quick/arm64/ |
| D | assemble_arm64.cc | 403 kFmtBitBlt, 21, 15, IS_QUAD_OP | REG_USE2 | REG_DEF01 | IS_LOAD_OFF,
407 kFmtBitBlt, 21, 15, IS_QUAD_OP | REG_USE2 | REG_DEF01 | IS_LOAD_OFF,
411 kFmtBitBlt, 21, 15, IS_QUAD_OP | REG_USE2 | REG_DEF012 | IS_LOAD,
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| /art/compiler/dex/quick/arm/ |
| D | assemble_arm.cc | 898 IS_QUAD_OP | REG_DEF0 | REG_DEF1 | REG_USE2 | REG_USE3,
1021 IS_QUAD_OP | REG_DEF0 | REG_DEF1 | REG_USE2 | REG_USE3,
1031 IS_QUAD_OP | REG_DEF0 | REG_DEF1 | REG_USE2 | IS_LOAD_OFF4,
1036 IS_QUAD_OP | REG_USE0 | REG_USE1 | REG_USE2 | IS_STORE_OFF4,
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| /art/compiler/dex/quick/mips/ |
| D | assemble_mips.cc | 237 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE2,
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