Searched refs:S1 (Results 1 – 11 of 11) sorted by relevance
/art/compiler/utils/arm/ |
D | managed_register_arm_test.cc | 78 reg = ArmManagedRegister::FromSRegister(S1); in TEST() 85 EXPECT_EQ(S1, reg.AsSRegister()); in TEST() 135 EXPECT_EQ(S1, reg.AsOverlappingDRegisterHigh()); in TEST() 312 EXPECT_TRUE(!reg_R1.Equals(ArmManagedRegister::FromSRegister(S1))); in TEST() 322 EXPECT_TRUE(!reg_R8.Equals(ArmManagedRegister::FromSRegister(S1))); in TEST() 331 EXPECT_TRUE(!reg_S0.Equals(ArmManagedRegister::FromSRegister(S1))); in TEST() 336 ArmManagedRegister reg_S1 = ArmManagedRegister::FromSRegister(S1); in TEST() 341 EXPECT_TRUE(reg_S1.Equals(ArmManagedRegister::FromSRegister(S1))); in TEST() 465 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromSRegister(S1))); in TEST() 487 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromSRegister(S1))); in TEST() [all …]
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/art/compiler/utils/arm64/ |
D | managed_register_arm64_test.cc | 182 sreg = Arm64ManagedRegister::FromSRegister(S1); in TEST() 190 EXPECT_EQ(S1, reg.AsOverlappingDRegisterLow()); in TEST() 295 EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::FromSRegister(S1))); in TEST() 322 EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::FromSRegister(S1))); in TEST() 332 EXPECT_TRUE(!reg_W12.Equals(Arm64ManagedRegister::FromSRegister(S1))); in TEST() 340 EXPECT_TRUE(!reg_S0.Equals(Arm64ManagedRegister::FromSRegister(S1))); in TEST() 344 Arm64ManagedRegister reg_S1 = Arm64ManagedRegister::FromSRegister(S1); in TEST() 350 EXPECT_TRUE(reg_S1.Equals(Arm64ManagedRegister::FromSRegister(S1))); in TEST() 399 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1))); in TEST() 421 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1))); in TEST() [all …]
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/art/compiler/utils/mips/ |
D | assembler_mips.cc | 643 StoreToOffset(kStoreWord, scratch.AsCoreRegister(), S1, dest.Int32Value()); in StoreImmediateToThread32() 653 S1, thr_offs.Int32Value()); in StoreStackOffsetToThread32() 657 StoreToOffset(kStoreWord, SP, S1, thr_offs.Int32Value()); in StoreStackPointerToThread32() 674 return EmitLoad(mdest, S1, src.Int32Value(), size); in LoadFromThread32() 706 LoadFromOffset(kLoadWord, dest.AsCoreRegister(), S1, offs.Int32Value()); in LoadRawPtrFromThread32() 759 S1, thr_offs.Int32Value()); in CopyRawPtrFromThread32() 772 S1, thr_offs.Int32Value()); in CopyRawPtrToThread32() 933 Move(tr.AsMips().AsCoreRegister(), S1); in GetCurrentThread() 938 StoreToOffset(kStoreWord, S1, SP, offset.Int32Value()); in GetCurrentThread() 946 S1, Thread::ExceptionOffset<4>().Int32Value()); in ExceptionPoll() [all …]
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/art/runtime/arch/arm/ |
D | registers_arm.h | 58 S1 = 1, enumerator
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D | quick_method_frame_info_arm.h | 36 (1 << art::arm::S0) | (1 << art::arm::S1) | (1 << art::arm::S2) | (1 << art::arm::S3) |
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/art/runtime/arch/mips/ |
D | registers_mips.h | 47 S1 = 17, enumerator
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D | quick_method_frame_info_mips.h | 33 (1 << art::mips::S0) | (1 << art::mips::S1);
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/art/compiler/utils/ |
D | assembler_thumb_test.cc | 995 __ vmovs(S1, 1.0); in TEST() 998 __ vmovs(S1, S2); in TEST() 1013 __ vadds(S0, S1, S2); in TEST() 1014 __ vsubs(S0, S1, S2); in TEST() 1015 __ vmuls(S0, S1, S2); in TEST() 1016 __ vmlas(S0, S1, S2); in TEST() 1017 __ vmlss(S0, S1, S2); in TEST() 1018 __ vdivs(S0, S1, S2); in TEST() 1019 __ vabss(S0, S1); in TEST() 1020 __ vnegs(S0, S1); in TEST() [all …]
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/art/runtime/arch/arm64/ |
D | registers_arm64.h | 155 S1 = 1, enumerator
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/art/compiler/jni/quick/arm64/ |
D | calling_convention_arm64.cc | 37 S0, S1, S2, S3, S4, S5, S6, S7
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/art/compiler/trampolines/ |
D | trampoline_compiler.cc | 110 __ LoadFromOffset(kLoadWord, T9, S1, offset.Int32Value()); in CreateTrampoline()
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