Searched refs:VRegB_22s (Results 1 – 6 of 6) sorted by relevance
| /art/runtime/ |
| D | dex_instruction.h | 352 uint4_t VRegB_22s() const { in VRegB_22s() function
353 return VRegB_22s(Fetch16(0)); in VRegB_22s()
374 uint4_t VRegB_22s(uint16_t inst_data) const;
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| D | dex_instruction-inl.h | 251 case k22s: return VRegB_22s(); in VRegB()
312 inline uint4_t Instruction::VRegB_22s(uint16_t inst_data) const { in VRegB_22s() function
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| D | dex_instruction.cc | 214 …case k22s: os << StringPrintf("%s v%d, v%d, #%+d", opcode, VRegA_22s(), VRegB_22s(), VRegC_22s())… in DumpString()
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| /art/runtime/interpreter/ |
| D | interpreter_switch_impl.cc | 2040 shadow_frame.GetVReg(inst->VRegB_22s(inst_data)) + in ExecuteSwitchImpl()
2048 shadow_frame.GetVReg(inst->VRegB_22s(inst_data))); in ExecuteSwitchImpl()
2054 shadow_frame.GetVReg(inst->VRegB_22s(inst_data)) * in ExecuteSwitchImpl()
2061 … shadow_frame.GetVReg(inst->VRegB_22s(inst_data)), inst->VRegC_22s()); in ExecuteSwitchImpl()
2068 … shadow_frame.GetVReg(inst->VRegB_22s(inst_data)), inst->VRegC_22s()); in ExecuteSwitchImpl()
2075 shadow_frame.GetVReg(inst->VRegB_22s(inst_data)) & in ExecuteSwitchImpl()
2082 shadow_frame.GetVReg(inst->VRegB_22s(inst_data)) | in ExecuteSwitchImpl()
2089 shadow_frame.GetVReg(inst->VRegB_22s(inst_data)) ^ in ExecuteSwitchImpl()
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| D | interpreter_goto_table_impl.cc | 2148 shadow_frame.GetVReg(inst->VRegB_22s(inst_data)) + in ExecuteGotoImpl()
2156 shadow_frame.GetVReg(inst->VRegB_22s(inst_data))); in ExecuteGotoImpl()
2162 shadow_frame.GetVReg(inst->VRegB_22s(inst_data)) * in ExecuteGotoImpl()
2169 shadow_frame.GetVReg(inst->VRegB_22s(inst_data)), inst->VRegC_22s()); in ExecuteGotoImpl()
2176 … shadow_frame.GetVReg(inst->VRegB_22s(inst_data)), inst->VRegC_22s()); in ExecuteGotoImpl()
2183 shadow_frame.GetVReg(inst->VRegB_22s(inst_data)) & in ExecuteGotoImpl()
2190 shadow_frame.GetVReg(inst->VRegB_22s(inst_data)) | in ExecuteGotoImpl()
2197 shadow_frame.GetVReg(inst->VRegB_22s(inst_data)) ^ in ExecuteGotoImpl()
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| /art/runtime/verifier/ |
| D | register_line.cc | 400 const uint32_t vregB = is_lit16 ? inst->VRegB_22s() : inst->VRegB_22b(); in CheckLiteralOp()
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