Searched refs:generation (Results 1 – 6 of 6) sorted by relevance
1 Test code generation for field accesses.
1 Test loop formation heuristics and code generation. Basically the problem to
1224 int generation = 0; in AssembleLIR() local1228 generation ^= 1; in AssembleLIR()1242 lir->flags.generation = generation; in AssembleLIR()1262 ((lir_target->flags.generation == lir->flags.generation) ? 0 : offset_adjustment); in AssembleLIR()1342 ((target_lir->flags.generation == lir->flags.generation) ? 0 : offset_adjustment); in AssembleLIR()1413 ((target_lir->flags.generation == lir->flags.generation) ? 0 : offset_adjustment); in AssembleLIR()1430 ((target_lir->flags.generation == lir->flags.generation) ? 0 : offset_adjustment); in AssembleLIR()1447 ((target_lir->flags.generation == lir->flags.generation) ? 0 : offset_adjustment); in AssembleLIR()1505 : target->offset + ((target->flags.generation == lir->flags.generation) ? 0 : in AssembleLIR()
828 int generation = 0; in AssembleLIR() local837 generation ^= 1; in AssembleLIR()851 lir->flags.generation = generation; in AssembleLIR()862 ((target_lir->flags.generation == lir->flags.generation) ? 0 : offset_adjustment); in AssembleLIR()877 ((target_lir->flags.generation == lir->flags.generation) ? 0 : offset_adjustment); in AssembleLIR()889 CodeOffset target_offs = ((target_lir->flags.generation == lir->flags.generation) ? in AssembleLIR()
17 code generation for switch tables, fill array data, 64-bit54 for Arm and x86. It might make sense to replace the inline code generation
180 unsigned int generation:1; // Used to track visitation state during fixup pass. member