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Searched refs:last_lir_insn_ (Results 1 – 12 of 12) sorted by relevance

/art/compiler/dex/quick/
Dgen_loadstore.cc215 def_start = last_lir_insn_; in StoreValue()
223 def_end = last_lir_insn_; in StoreValue()
304 def_start = last_lir_insn_; in StoreValueWide()
310 def_end = last_lir_insn_; in StoreValueWide()
334 LIR *def_start = last_lir_insn_; in StoreFinalValue()
338 LIR *def_end = last_lir_insn_; in StoreFinalValue()
368 LIR *def_start = last_lir_insn_; in StoreFinalValueWide()
374 LIR *def_end = last_lir_insn_; in StoreFinalValueWide()
Dcodegen_util.cc95 DCHECK_EQ(after, last_lir_insn_); in MarkSafepointPCAfter()
111 DCHECK(lir == last_lir_insn_); in UnlinkLIR()
112 last_lir_insn_ = NULL; in UnlinkLIR()
114 } else if (lir == last_lir_insn_) { in UnlinkLIR()
115 last_lir_insn_ = lir->prev; in UnlinkLIR()
1021 last_lir_insn_(NULL), in Mir2Lir()
1146 DCHECK(last_lir_insn_ == NULL); in AppendLIR()
1147 last_lir_insn_ = first_lir_insn_ = lir; in AppendLIR()
1150 last_lir_insn_->next = lir; in AppendLIR()
1151 lir->prev = last_lir_insn_; in AppendLIR()
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Dgen_common.cc184 MarkSafepointPC(last_lir_insn_); in MarkPossibleNullPointerException()
199 MarkSafepointPC(last_lir_insn_); in MarkPossibleStackOverflowException()
Dmir_to_lir.cc1201 ApplyLocalOptimizations(head_lir, last_lir_insn_); in MethodBlockCodeGen()
Dmir_to_lir.h1730 LIR* last_lir_insn_; variable
/art/compiler/dex/quick/arm/
Dint_arm.cc216 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenSelectConst32()
252 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenSelect()
258 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenSelect()
918 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenInlinedCas()
925 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenInlinedCas()
946 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenInlinedCas()
1105 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in OpDecAndBranch()
1112 LIR* barrier = last_lir_insn_; in GenMemBarrier()
Dcall_arm.cc89 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenLargeSparseSwitch()
Dassemble_arm.cc1215 CodeOffset starting_offset = LinkFixupInsns(first_lir_insn_, last_lir_insn_, 0); in AssembleLIR()
/art/compiler/dex/quick/x86/
Dint_x86.cc252 DCHECK(!last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenSelectConst32()
990 DCHECK(!DECODE_ALIAS_INFO_WIDE(last_lir_insn_->flags.alias_info)); in GenInlinedCas()
991 int reg_id = DECODE_ALIAS_INFO_REG(last_lir_insn_->flags.alias_info) - push_offset / 4u; in GenInlinedCas()
992 AnnotateDalvikRegAccess(last_lir_insn_, reg_id, true, false); in GenInlinedCas()
997 DCHECK(!DECODE_ALIAS_INFO_WIDE(last_lir_insn_->flags.alias_info)); in GenInlinedCas()
998 int reg_id = DECODE_ALIAS_INFO_REG(last_lir_insn_->flags.alias_info) - push_offset / 4u; in GenInlinedCas()
999 AnnotateDalvikRegAccess(last_lir_insn_, reg_id, true, false); in GenInlinedCas()
Dtarget_x86.cc578 LIR* mem_barrier = last_lir_insn_; in GenMemBarrier()
1363 DCHECK(!DECODE_ALIAS_INFO_WIDE(last_lir_insn_->flags.alias_info)); in GenInlinedIndexOf()
1364 int reg_id = DECODE_ALIAS_INFO_REG(last_lir_insn_->flags.alias_info) - 1; in GenInlinedIndexOf()
1365 AnnotateDalvikRegAccess(last_lir_insn_, reg_id, true, false); in GenInlinedIndexOf()
/art/compiler/dex/quick/arm64/
Dint_arm64.cc770 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenInlinedCas()
774 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in GenInlinedCas()
948 DCHECK(last_lir_insn_->u.m.def_mask->HasBit(ResourceMask::kCCode)); in OpDecAndBranch()
955 LIR* barrier = last_lir_insn_; in GenMemBarrier()
Dassemble_arm64.cc819 CodeOffset starting_offset = LinkFixupInsns(first_lir_insn_, last_lir_insn_, 0); in AssembleLIR()