Home
last modified time | relevance | path

Searched refs:rl_src1 (Results 1 – 16 of 16) sorted by relevance

/art/compiler/dex/quick/arm64/
Dfp_arm64.cc25 RegLocation rl_src1, RegLocation rl_src2) { in GenArithOpFloat() argument
49 CallRuntimeHelperRegLocationRegLocation(kQuickFmodf, rl_src1, rl_src2, false); in GenArithOpFloat()
54 GenNegFloat(rl_dest, rl_src1); in GenArithOpFloat()
59 rl_src1 = LoadValue(rl_src1, kFPReg); in GenArithOpFloat()
62 NewLIR3(op, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); in GenArithOpFloat()
67 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) { in GenArithOpDouble() argument
93 LoadValueDirectWideFixed(rl_src1, rs_d0); in GenArithOpDouble()
102 GenNegDouble(rl_dest, rl_src1); in GenArithOpDouble()
108 rl_src1 = LoadValueWide(rl_src1, kFPReg); in GenArithOpDouble()
109 DCHECK(rl_src1.wide); in GenArithOpDouble()
[all …]
Dint_arm64.cc49 void Arm64Mir2Lir::GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, in GenCmpLong() argument
52 rl_src1 = LoadValueWide(rl_src1, kCoreReg); in GenCmpLong()
56 OpRegReg(kOpCmp, rl_src1.reg, rl_src2.reg); in GenCmpLong()
64 RegLocation rl_src1, RegLocation rl_shift) { in GenShiftOpLong() argument
83 rl_src1 = LoadValueWide(rl_src1, kCoreReg); in GenShiftOpLong()
85 OpRegRegReg(op, rl_result.reg, rl_src1.reg, As64BitReg(rl_shift.reg)); in GenShiftOpLong()
215 RegLocation rl_src1 = mir_graph_->GetSrcWide(mir, 0); in GenFusedLongCmpBranch() local
221 if (rl_src1.is_const) { in GenFusedLongCmpBranch()
222 std::swap(rl_src1, rl_src2); in GenFusedLongCmpBranch()
226 rl_src1 = LoadValueWide(rl_src1, kCoreReg); in GenFusedLongCmpBranch()
[all …]
Dcodegen_arm64.h140 void GenShiftOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
142 void GenArithImmOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
148 void GenShiftImmOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
150 void GenArithOpDouble(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
152 void GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
154 void GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
173 void GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
179 void GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) OVERRIDE;
342 RegLocation GenDivRem(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2,
344 RegLocation GenDivRemLit(RegLocation rl_dest, RegLocation rl_src1, int lit, bool is_div);
[all …]
/art/compiler/dex/quick/mips/
Dfp_mips.cc25 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) { in GenArithOpFloat() argument
53 CallRuntimeHelperRegLocationRegLocation(kQuickFmodf, rl_src1, rl_src2, false); in GenArithOpFloat()
58 GenNegFloat(rl_dest, rl_src1); in GenArithOpFloat()
63 rl_src1 = LoadValue(rl_src1, kFPReg); in GenArithOpFloat()
66 NewLIR3(op, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); in GenArithOpFloat()
71 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) { in GenArithOpDouble() argument
95 CallRuntimeHelperRegLocationRegLocation(kQuickFmod, rl_src1, rl_src2, false); in GenArithOpDouble()
100 GenNegDouble(rl_dest, rl_src1); in GenArithOpDouble()
105 rl_src1 = LoadValueWide(rl_src1, kFPReg); in GenArithOpDouble()
106 DCHECK(rl_src1.wide); in GenArithOpDouble()
[all …]
Dint_mips.cc44 void MipsMir2Lir::GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, in GenCmpLong() argument
46 rl_src1 = LoadValueWide(rl_src1, kCoreReg); in GenCmpLong()
51 NewLIR3(kMipsSlt, t0.GetReg(), rl_src1.reg.GetHighReg(), rl_src2.reg.GetHighReg()); in GenCmpLong()
52 NewLIR3(kMipsSlt, t1.GetReg(), rl_src2.reg.GetHighReg(), rl_src1.reg.GetHighReg()); in GenCmpLong()
55 NewLIR3(kMipsSltu, t0.GetReg(), rl_src1.reg.GetLowReg(), rl_src2.reg.GetLowReg()); in GenCmpLong()
56 NewLIR3(kMipsSltu, t1.GetReg(), rl_src2.reg.GetLowReg(), rl_src1.reg.GetLowReg()); in GenCmpLong()
265 RegLocation MipsMir2Lir::GenDivRem(RegLocation rl_dest, RegLocation rl_src1, in GenDivRem() argument
271 RegLocation MipsMir2Lir::GenDivRemLit(RegLocation rl_dest, RegLocation rl_src1, int lit, bool is_di… in GenDivRemLit() argument
396 RegLocation rl_src1, RegLocation rl_src2) { in GenAddLong() argument
397 rl_src1 = LoadValueWide(rl_src1, kCoreReg); in GenAddLong()
[all …]
Dcodegen_mips.h88 RegLocation rl_src1, RegLocation rl_src2);
93 void GenShiftImmOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
95 void GenArithOpDouble(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
97 void GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
99 void GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
109 void GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
113 void GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
186 void GenAddLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
188 void GenSubLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
192 RegLocation GenDivRem(RegLocation rl_dest, RegLocation rl_src1,
[all …]
/art/compiler/dex/quick/arm/
Dfp_arm.cc24 RegLocation rl_src1, RegLocation rl_src2) { in GenArithOpFloat() argument
52 CallRuntimeHelperRegLocationRegLocation(kQuickFmodf, rl_src1, rl_src2, false); in GenArithOpFloat()
57 GenNegFloat(rl_dest, rl_src1); in GenArithOpFloat()
62 rl_src1 = LoadValue(rl_src1, kFPReg); in GenArithOpFloat()
65 NewLIR3(op, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); in GenArithOpFloat()
70 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) { in GenArithOpDouble() argument
94 CallRuntimeHelperRegLocationRegLocation(kQuickFmod, rl_src1, rl_src2, false); in GenArithOpDouble()
99 GenNegDouble(rl_dest, rl_src1); in GenArithOpDouble()
105 rl_src1 = LoadValueWide(rl_src1, kFPReg); in GenArithOpDouble()
106 DCHECK(rl_src1.wide); in GenArithOpDouble()
[all …]
Dint_arm.cc122 void ArmMir2Lir::GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) { in GenCmpLong() argument
125 rl_src1 = LoadValueWide(rl_src1, kCoreReg); in GenCmpLong()
129 OpRegReg(kOpCmp, rl_src1.reg.GetHigh(), rl_src2.reg.GetHigh()); in GenCmpLong()
132 OpRegRegReg(kOpSub, t_reg, rl_src1.reg.GetLow(), rl_src2.reg.GetLow()); in GenCmpLong()
155 void ArmMir2Lir::GenFusedLongCmpImmBranch(BasicBlock* bb, RegLocation rl_src1, in GenFusedLongCmpImmBranch() argument
163 rl_src1 = LoadValueWide(rl_src1, kCoreReg); in GenFusedLongCmpImmBranch()
164 RegStorage low_reg = rl_src1.reg.GetLow(); in GenFusedLongCmpImmBranch()
165 RegStorage high_reg = rl_src1.reg.GetHigh(); in GenFusedLongCmpImmBranch()
306 RegLocation rl_src1 = mir_graph_->GetSrcWide(mir, 0); in GenFusedLongCmpBranch() local
310 if (rl_src1.is_const) { in GenFusedLongCmpBranch()
[all …]
Dcodegen_arm.h87 void GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
90 RegLocation rl_src1, RegLocation rl_src2);
96 RegLocation rl_src1, RegLocation rl_shift);
97 void GenArithOpDouble(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
99 void GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
101 void GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
114 void GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
192 void GenMulLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
194 void GenFusedLongCmpImmBranch(BasicBlock* bb, RegLocation rl_src1, int64_t val,
203 RegLocation GenDivRem(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2,
[all …]
/art/compiler/dex/quick/x86/
Dfp_x86.cc25 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) { in GenArithOpFloat() argument
52 GenRemFP(rl_dest, rl_src1, rl_src2, false /* is_double */); in GenArithOpFloat()
55 GenNegFloat(rl_dest, rl_src1); in GenArithOpFloat()
60 rl_src1 = LoadValue(rl_src1, kFPReg); in GenArithOpFloat()
64 RegStorage r_src1 = rl_src1.reg; in GenArithOpFloat()
76 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) { in GenArithOpDouble() argument
79 DCHECK(rl_src1.wide); in GenArithOpDouble()
80 DCHECK(rl_src1.fp); in GenArithOpDouble()
105 GenRemFP(rl_dest, rl_src1, rl_src2, true /* is_double */); in GenArithOpDouble()
108 GenNegDouble(rl_dest, rl_src1); in GenArithOpDouble()
[all …]
Dint_x86.cc34 void X86Mir2Lir::GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, in GenCmpLong() argument
37 rl_src1 = LoadValueWide(rl_src1, kCoreReg); in GenCmpLong()
41 OpRegReg(kOpCmp, rl_src1.reg, rl_src2.reg); in GenCmpLong()
56 LoadValueDirectWideFixed(rl_src1, r_tmp1); in GenCmpLong()
386 RegLocation rl_src1 = mir_graph_->GetSrcWide(mir, 0); in GenFusedLongCmpBranch() local
390 if (rl_src1.is_const) { in GenFusedLongCmpBranch()
391 std::swap(rl_src1, rl_src2); in GenFusedLongCmpBranch()
397 GenFusedLongCmpImmBranch(bb, rl_src1, val, ccode); in GenFusedLongCmpBranch()
402 rl_src1 = LoadValueWide(rl_src1, kCoreReg); in GenFusedLongCmpBranch()
405 OpRegReg(kOpCmp, rl_src1.reg, rl_src2.reg); in GenFusedLongCmpBranch()
[all …]
Dcodegen_x86.h151 void GenArithOpDouble(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
153 void GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
155 void GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
170 void GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
172 void GenArithImmOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
175 RegLocation rl_src1, RegLocation rl_shift) OVERRIDE;
176 void GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) OVERRIDE;
179 RegLocation rl_src1, RegLocation rl_shift) OVERRIDE;
198 bool GenLongLongImm(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2,
208 virtual void GenLongArith(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2,
[all …]
/art/compiler/dex/portable/
Dmir_to_gbc.h118 RegLocation rl_src1, RegLocation rl_src2);
120 RegLocation rl_src1);
125 void ConvertFPArithOp(OpKind op, RegLocation rl_dest, RegLocation rl_src1,
128 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
131 void ConvertArithOp(OpKind op, RegLocation rl_dest, RegLocation rl_src1,
133 void ConvertArithOpLit(OpKind op, RegLocation rl_dest, RegLocation rl_src1,
158 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
Dmir_to_gbc.cc330 ConditionCode cc, RegLocation rl_src1, RegLocation rl_src2) { in ConvertCompareAndBranch() argument
334 ::llvm::Value* src1 = GetLLVMValue(rl_src1.orig_sreg); in ConvertCompareAndBranch()
345 MIR* mir, ConditionCode cc, RegLocation rl_src1) { in ConvertCompareZeroAndBranch() argument
349 ::llvm::Value* src1 = GetLLVMValue(rl_src1.orig_sreg); in ConvertCompareZeroAndBranch()
351 if (rl_src1.ref) { in ConvertCompareZeroAndBranch()
409 RegLocation rl_src1, RegLocation rl_src2) { in ConvertFPArithOp() argument
410 ::llvm::Value* src1 = GetLLVMValue(rl_src1.orig_sreg); in ConvertFPArithOp()
426 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) { in ConvertShift() argument
429 args.push_back(GetLLVMValue(rl_src1.orig_sreg)); in ConvertShift()
446 RegLocation rl_src1, RegLocation rl_src2) { in ConvertArithOp() argument
[all …]
/art/compiler/dex/quick/
Dgen_common.cc218 void Mir2Lir::GenCompareAndBranch(Instruction::Code opcode, RegLocation rl_src1, in GenCompareAndBranch() argument
221 DCHECK(!rl_src1.fp); in GenCompareAndBranch()
249 if (rl_src1.is_const) { in GenCompareAndBranch()
250 RegLocation rl_temp = rl_src1; in GenCompareAndBranch()
251 rl_src1 = rl_src2; in GenCompareAndBranch()
256 rl_src1 = LoadValue(rl_src1); in GenCompareAndBranch()
265 OpCmpImmBranch(cond, rl_src1.reg, mir_graph_->ConstantValue(rl_src2), taken); in GenCompareAndBranch()
275 OpCmpImmBranch(cond, rl_src1.reg, 0, taken); in GenCompareAndBranch()
281 OpCmpBranch(cond, rl_src1.reg, rl_src2.reg, taken); in GenCompareAndBranch()
1350 RegLocation rl_src1, RegLocation rl_src2) { in GenLong3Addr() argument
[all …]
Dmir_to_lir.h841 void GenCompareAndBranch(Instruction::Code opcode, RegLocation rl_src1,
869 RegLocation rl_src1, RegLocation rl_src2);
871 RegLocation rl_src1, RegLocation rl_shift);
875 RegLocation rl_src1, RegLocation rl_src2);
883 RegLocation rl_src1, RegLocation rl_src2);
1259 RegLocation rl_src1, RegLocation rl_src2) = 0;
1261 RegLocation rl_dest, RegLocation rl_src1,
1264 RegLocation rl_src1, RegLocation rl_src2) = 0;
1266 RegLocation rl_src1, RegLocation rl_src2) = 0;
1299 virtual RegLocation GenDivRem(RegLocation rl_dest, RegLocation rl_src1,
[all …]