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Searched refs:ARM64 (Results 1 – 25 of 30) sorted by relevance

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/external/llvm/test/CodeGen/AArch64/
Darm64-fast-isel-intrinsic.ll1 …abort -relocation-model=dynamic-no-pic -mtriple=arm64-apple-ios | FileCheck %s --check-prefix=ARM64
7 ; ARM64-LABEL: t1
8 ; ARM64: adrp x8, _message@PAGE
9 ; ARM64: add x0, x8, _message@PAGEOFF
10 ; ARM64: movz w9, #0
11 ; ARM64: movz x2, #0x50
12 ; ARM64: uxtb w1, w9
13 ; ARM64: bl _memset
21 ; ARM64-LABEL: t2
22 ; ARM64: adrp x8, _temp@GOTPAGE
[all …]
Dalloca.ll2 …inux-gnu -mattr=-fp-armv8 -verify-machineinstrs < %s | FileCheck --check-prefix=CHECK-NOFP-ARM64 %s
88 ; CHECK-NOFP-ARM64: stp x29, x30, [sp, #-16]!
89 ; CHECK-NOFP-ARM64: mov x29, sp
90 ; CHECK-NOFP-ARM64: sub sp, sp, #64
91 ; CHECK-NOFP-ARM64: stp x6, x7, [x29, #-16]
93 ; CHECK-NOFP-ARM64: stp x4, x5, [x29, #-32]
95 ; CHECK-NOFP-ARM64: stp x2, x3, [x29, #-48]
97 ; CHECK-NOFP-ARM64: mov x8, sp
110 ; CHECK-NOFP-ARM64: mov sp, x29
111 ; CHECK-NOFP-ARM64: ldp x29, x30, [sp], #16
Dlocal_vars.ll2 …%s -mtriple=aarch64-none-linux-gnu -disable-fp-elim | FileCheck -check-prefix CHECK-WITHFP-ARM64 %s
32 ; CHECK-WITHFP-ARM64-LABEL: trivial_fp_func:
33 ; CHECK-WITHFP-ARM64: stp x29, x30, [sp, #-16]!
34 ; CHECK-WITHFP-ARM64-NEXT: mov x29, sp
Dfp-cond-sel.ll23 ; FLT0 is reused from above on ARM64.
Darm64-memset-to-bzero.ll5 ; <rdar://problem/14199482> ARM64: Calls to bzero() replaced with calls to memset()
Darm64-misched-basic-A53.ll114 ; [ARM64] Cortex-a53 schedule mode can't handle NEON post-increment load
/external/clang/test/CodeGenObjC/
Dstret.m3 …clang_cc1 -fblocks -triple arm64-apple-darwin %s -emit-llvm -o - | FileCheck %s -check-prefix=ARM64
5 // <rdar://problem/9757015>: Don't use 'stret' variants on ARM64.
13 // ARM64: @main
14 // ARM64-NOT: @objc_msgSend_stret
Dstret-1.m1 …cc1 -fblocks -triple arm64-apple-darwin %s -emit-llvm -o - | FileCheck %s -check-prefix=CHECK-ARM64
20 // CHECK-ARM64: call void @llvm.memset.p0i8.i64(i8* [[T0:%.*]], i8 0, i64 400, i32 4, i1 false)
Darc-arm.m4 // <rdar://12438598>: use an autorelease marker on ARM64.
/external/valgrind/main/VEX/auxprogs/
Dgenoffsets.c164 GENOFFSET(ARM64,arm64,X0); in foo()
165 GENOFFSET(ARM64,arm64,X1); in foo()
166 GENOFFSET(ARM64,arm64,X2); in foo()
167 GENOFFSET(ARM64,arm64,X3); in foo()
168 GENOFFSET(ARM64,arm64,X4); in foo()
169 GENOFFSET(ARM64,arm64,X5); in foo()
170 GENOFFSET(ARM64,arm64,X6); in foo()
171 GENOFFSET(ARM64,arm64,X7); in foo()
172 GENOFFSET(ARM64,arm64,X8); in foo()
173 GENOFFSET(ARM64,arm64,XSP); in foo()
[all …]
/external/chromium_org/third_party/WebKit/Source/platform/audio/
DDenormalDisabler.h48 #if CPU(ARM) || CPU(ARM64)
115 #elif CPU(ARM) || CPU(ARM64)
131 #if CPU(ARM64) in getStatusWord()
141 #if CPU(ARM64) in setStatusWord()
/external/valgrind/main/coregrind/
Dpub_core_basics.h116 } ARM64; member
Dm_libcassert.c157 (srP)->misc.ARM64.x29 = block[2]; \
158 (srP)->misc.ARM64.x30 = block[3]; \
Dm_stacktrace.c1059 uregs.x30 = startRegs->misc.ARM64.x30; in VG_()
1060 uregs.x29 = startRegs->misc.ARM64.x29; in VG_()
Dm_machine.c103 regs->misc.ARM64.x29 = VG_(threads)[tid].arch.vex.guest_X29; in VG_()
104 regs->misc.ARM64.x30 = VG_(threads)[tid].arch.vex.guest_X30; in VG_()
Dm_signals.c398 (srP)->misc.ARM64.x29 = (uc)->uc_mcontext.regs[29]; \
399 (srP)->misc.ARM64.x30 = (uc)->uc_mcontext.regs[30]; \
/external/llvm/test/MC/AArch64/
Darm64-separator.s3 ; ARM64 uses a multi-character statement separator, "%%". Check that we lex
/external/chromium_org/third_party/WebKit/Source/wtf/
DAddressSpaceRandomization.cpp85 #elif CPU(ARM64) in getRandomPageBase()
/external/llvm/test/Transforms/LoopStrengthReduce/AArch64/
Dlsr-memcpy.ll6 ; <rdar://problem/12702735> [ARM64][coalescer] need better register
Dlsr-memset.ll8 ; <rdar://problem/12702735> [ARM64][coalescer] need better register
/external/chromium_org/third_party/openmax_dl/dl/sp/src/test/
Dtest_fft.gyp228 # Supported test programs for ARM64
/external/chromium_org/third_party/ocmock/OCMock/
DOCMBoxedReturnValueProvider.mm76 // ARM64 uses 'B' for BOOLs in method signature but 'c' in NSValue. That case
/external/llvm/test/Transforms/InstCombine/
D2012-04-23-Neon-Intrinsics.ll67 ; ARM64 variants - <rdar://problem/12349617>
/external/llvm/
DCREDITS.TXT174 D: Led effort for the backend formerly known as ARM64
/external/ltrace/
DNEWS36 ARM64 processors.

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