/external/llvm/test/CodeGen/AArch64/ |
D | arm64-fast-isel-intrinsic.ll | 1 …abort -relocation-model=dynamic-no-pic -mtriple=arm64-apple-ios | FileCheck %s --check-prefix=ARM64 7 ; ARM64-LABEL: t1 8 ; ARM64: adrp x8, _message@PAGE 9 ; ARM64: add x0, x8, _message@PAGEOFF 10 ; ARM64: movz w9, #0 11 ; ARM64: movz x2, #0x50 12 ; ARM64: uxtb w1, w9 13 ; ARM64: bl _memset 21 ; ARM64-LABEL: t2 22 ; ARM64: adrp x8, _temp@GOTPAGE [all …]
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D | alloca.ll | 2 …inux-gnu -mattr=-fp-armv8 -verify-machineinstrs < %s | FileCheck --check-prefix=CHECK-NOFP-ARM64 %s 88 ; CHECK-NOFP-ARM64: stp x29, x30, [sp, #-16]! 89 ; CHECK-NOFP-ARM64: mov x29, sp 90 ; CHECK-NOFP-ARM64: sub sp, sp, #64 91 ; CHECK-NOFP-ARM64: stp x6, x7, [x29, #-16] 93 ; CHECK-NOFP-ARM64: stp x4, x5, [x29, #-32] 95 ; CHECK-NOFP-ARM64: stp x2, x3, [x29, #-48] 97 ; CHECK-NOFP-ARM64: mov x8, sp 110 ; CHECK-NOFP-ARM64: mov sp, x29 111 ; CHECK-NOFP-ARM64: ldp x29, x30, [sp], #16
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D | local_vars.ll | 2 …%s -mtriple=aarch64-none-linux-gnu -disable-fp-elim | FileCheck -check-prefix CHECK-WITHFP-ARM64 %s 32 ; CHECK-WITHFP-ARM64-LABEL: trivial_fp_func: 33 ; CHECK-WITHFP-ARM64: stp x29, x30, [sp, #-16]! 34 ; CHECK-WITHFP-ARM64-NEXT: mov x29, sp
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D | fp-cond-sel.ll | 23 ; FLT0 is reused from above on ARM64.
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D | arm64-memset-to-bzero.ll | 5 ; <rdar://problem/14199482> ARM64: Calls to bzero() replaced with calls to memset()
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D | arm64-misched-basic-A53.ll | 114 ; [ARM64] Cortex-a53 schedule mode can't handle NEON post-increment load
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/external/clang/test/CodeGenObjC/ |
D | stret.m | 3 …clang_cc1 -fblocks -triple arm64-apple-darwin %s -emit-llvm -o - | FileCheck %s -check-prefix=ARM64 5 // <rdar://problem/9757015>: Don't use 'stret' variants on ARM64. 13 // ARM64: @main 14 // ARM64-NOT: @objc_msgSend_stret
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D | stret-1.m | 1 …cc1 -fblocks -triple arm64-apple-darwin %s -emit-llvm -o - | FileCheck %s -check-prefix=CHECK-ARM64 20 // CHECK-ARM64: call void @llvm.memset.p0i8.i64(i8* [[T0:%.*]], i8 0, i64 400, i32 4, i1 false)
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D | arc-arm.m | 4 // <rdar://12438598>: use an autorelease marker on ARM64.
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/external/valgrind/main/VEX/auxprogs/ |
D | genoffsets.c | 164 GENOFFSET(ARM64,arm64,X0); in foo() 165 GENOFFSET(ARM64,arm64,X1); in foo() 166 GENOFFSET(ARM64,arm64,X2); in foo() 167 GENOFFSET(ARM64,arm64,X3); in foo() 168 GENOFFSET(ARM64,arm64,X4); in foo() 169 GENOFFSET(ARM64,arm64,X5); in foo() 170 GENOFFSET(ARM64,arm64,X6); in foo() 171 GENOFFSET(ARM64,arm64,X7); in foo() 172 GENOFFSET(ARM64,arm64,X8); in foo() 173 GENOFFSET(ARM64,arm64,XSP); in foo() [all …]
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/external/chromium_org/third_party/WebKit/Source/platform/audio/ |
D | DenormalDisabler.h | 48 #if CPU(ARM) || CPU(ARM64) 115 #elif CPU(ARM) || CPU(ARM64) 131 #if CPU(ARM64) in getStatusWord() 141 #if CPU(ARM64) in setStatusWord()
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/external/valgrind/main/coregrind/ |
D | pub_core_basics.h | 116 } ARM64; member
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D | m_libcassert.c | 157 (srP)->misc.ARM64.x29 = block[2]; \ 158 (srP)->misc.ARM64.x30 = block[3]; \
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D | m_stacktrace.c | 1059 uregs.x30 = startRegs->misc.ARM64.x30; in VG_() 1060 uregs.x29 = startRegs->misc.ARM64.x29; in VG_()
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D | m_machine.c | 103 regs->misc.ARM64.x29 = VG_(threads)[tid].arch.vex.guest_X29; in VG_() 104 regs->misc.ARM64.x30 = VG_(threads)[tid].arch.vex.guest_X30; in VG_()
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D | m_signals.c | 398 (srP)->misc.ARM64.x29 = (uc)->uc_mcontext.regs[29]; \ 399 (srP)->misc.ARM64.x30 = (uc)->uc_mcontext.regs[30]; \
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/external/llvm/test/MC/AArch64/ |
D | arm64-separator.s | 3 ; ARM64 uses a multi-character statement separator, "%%". Check that we lex
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/external/chromium_org/third_party/WebKit/Source/wtf/ |
D | AddressSpaceRandomization.cpp | 85 #elif CPU(ARM64) in getRandomPageBase()
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/external/llvm/test/Transforms/LoopStrengthReduce/AArch64/ |
D | lsr-memcpy.ll | 6 ; <rdar://problem/12702735> [ARM64][coalescer] need better register
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D | lsr-memset.ll | 8 ; <rdar://problem/12702735> [ARM64][coalescer] need better register
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/external/chromium_org/third_party/openmax_dl/dl/sp/src/test/ |
D | test_fft.gyp | 228 # Supported test programs for ARM64
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/external/chromium_org/third_party/ocmock/OCMock/ |
D | OCMBoxedReturnValueProvider.mm | 76 // ARM64 uses 'B' for BOOLs in method signature but 'c' in NSValue. That case
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/external/llvm/test/Transforms/InstCombine/ |
D | 2012-04-23-Neon-Intrinsics.ll | 67 ; ARM64 variants - <rdar://problem/12349617>
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/external/llvm/ |
D | CREDITS.TXT | 174 D: Led effort for the backend formerly known as ARM64
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/external/ltrace/ |
D | NEWS | 36 ARM64 processors.
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