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Searched refs:ATOMIC_LOAD (Results 1 – 15 of 15) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h640 ATOMIC_LOAD, enumerator
DSelectionDAGNodes.h1146 N->getOpcode() == ISD::ATOMIC_LOAD ||
1261 N->getOpcode() == ISD::ATOMIC_LOAD ||
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp70 case ISD::ATOMIC_LOAD: return "AtomicLoad"; in getOperationName()
DLegalizeIntegerTypes.cpp124 case ISD::ATOMIC_LOAD: in PromoteIntegerResult()
1153 case ISD::ATOMIC_LOAD: ExpandIntRes_ATOMIC_LOAD(N, Lo, Hi); break; in ExpandIntegerResult()
DSelectionDAG.cpp518 case ISD::ATOMIC_LOAD: in AddNodeIDCustom()
4475 if (Opcode != ISD::ATOMIC_LOAD) in getAtomic()
4520 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op"); in getAtomic()
DLegalizeDAG.cpp3010 case ISD::ATOMIC_LOAD: { in ExpandNode()
DSelectionDAGBuilder.cpp3733 DAG.getAtomic(ISD::ATOMIC_LOAD, dl, VT, VT, InChain, in visitAtomicLoad()
/external/llvm/lib/Target/XCore/
DXCoreISelLowering.cpp163 setOperationAction(ISD::ATOMIC_LOAD, MVT::i32, Custom); in XCoreTargetLowering()
230 case ISD::ATOMIC_LOAD: return LowerATOMIC_LOAD(Op, DAG); in LowerOperation()
962 assert(N->getOpcode() == ISD::ATOMIC_LOAD && "Bad Atomic OP"); in LowerATOMIC_LOAD()
/external/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp1495 setOperationAction(ISD::ATOMIC_LOAD, MVT::i32, Custom); in SparcTargetLowering()
1501 setOperationAction(ISD::ATOMIC_LOAD, MVT::i64, Custom); in SparcTargetLowering()
2831 case ISD::ATOMIC_LOAD: in LowerOperation()
/external/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp159 setOperationAction(ISD::ATOMIC_LOAD, VT, Custom); in SystemZTargetLowering()
2443 case ISD::ATOMIC_LOAD: in LowerOperation()
/external/llvm/include/llvm/Target/
DTargetSelectionDAG.td445 def atomic_load : SDNode<"ISD::ATOMIC_LOAD", SDTAtomicLoad,
/external/llvm/lib/Target/Mips/
DMipsISelLowering.cpp354 setOperationAction(ISD::ATOMIC_LOAD, MVT::i32, Expand); in MipsTargetLowering()
355 setOperationAction(ISD::ATOMIC_LOAD, MVT::i64, Expand); in MipsTargetLowering()
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp620 setOperationAction(ISD::ATOMIC_LOAD, MVT::i32, Expand); in PPCTargetLowering()
622 setOperationAction(ISD::ATOMIC_LOAD, MVT::i64, Expand); in PPCTargetLowering()
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp752 setOperationAction(ISD::ATOMIC_LOAD, MVT::i32, Custom); in ARMTargetLowering()
6252 case ISD::ATOMIC_LOAD: in LowerOperation()
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp16439 case ISD::ATOMIC_LOAD: { in ReplaceNodeResults()