| /external/vixl/src/a64/ |
| D | decoder-a64.cc | 167 VIXL_ASSERT(instr->Bit(28) == 0x1); in DecodePCRelAddressing()
186 if (instr->Bit(25) == 0) { in DecodeBranchSystemException()
194 if (instr->Bit(25) == 0) { in DecodeBranchSystemException()
195 if ((instr->Bit(24) == 0x1) || in DecodeBranchSystemException()
207 if (instr->Bit(25) == 0) { in DecodeBranchSystemException()
208 if (instr->Bit(24) == 0) { in DecodeBranchSystemException()
251 if ((instr->Bit(24) == 0x1) || in DecodeBranchSystemException()
279 if (instr->Bit(24) == 0) { in DecodeLoadStore()
280 if (instr->Bit(28) == 0) { in DecodeLoadStore()
281 if (instr->Bit(29) == 0) { in DecodeLoadStore()
[all …]
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| D | macro-assembler-a64.cc | 1406 IncludeByRegList(available_, list.list() & ~(xzr.Bit() | sp.Bit())); in Include()
1418 RegList include = reg1.Bit() | reg2.Bit() | reg3.Bit() | reg4.Bit(); in Include()
1420 include &= ~(xzr.Bit() | sp.Bit()); in Include()
1430 RegList include = reg1.Bit() | reg2.Bit() | reg3.Bit() | reg4.Bit(); in Include()
1449 RegList exclude = reg1.Bit() | reg2.Bit() | reg3.Bit() | reg4.Bit(); in Exclude()
1458 RegList excludefp = reg1.Bit() | reg2.Bit() | reg3.Bit() | reg4.Bit(); in Exclude()
1474 exclude |= regs[i].Bit(); in Exclude()
1476 excludefp |= regs[i].Bit(); in Exclude()
|
| /external/chromium_org/v8/src/arm64/ |
| D | decoder-arm64-inl.h | 102 DCHECK(instr->Bit(28) == 0x1); in DecodePCRelAddressing()
122 if (instr->Bit(25) == 0) { in DecodeBranchSystemException()
130 if (instr->Bit(25) == 0) { in DecodeBranchSystemException()
131 if ((instr->Bit(24) == 0x1) || in DecodeBranchSystemException()
143 if (instr->Bit(25) == 0) { in DecodeBranchSystemException()
144 if (instr->Bit(24) == 0) { in DecodeBranchSystemException()
187 if ((instr->Bit(24) == 0x1) || in DecodeBranchSystemException()
216 if (instr->Bit(24) == 0) { in DecodeLoadStore()
217 if (instr->Bit(28) == 0) { in DecodeLoadStore()
218 if (instr->Bit(29) == 0) { in DecodeLoadStore()
[all …]
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| D | debug-arm64.cc | 156 DCHECK((scratch.Bit() & object_regs) == 0); in Generate_DebugBreakCallHelper()
157 DCHECK((scratch.Bit() & non_object_regs) == 0); in Generate_DebugBreakCallHelper()
233 Generate_DebugBreakCallHelper(masm, x1.Bit() | x3.Bit(), 0, x10); in GenerateCallICStubDebugBreak()
241 Generate_DebugBreakCallHelper(masm, receiver.Bit() | name.Bit(), 0, x10); in GenerateLoadICDebugBreak()
251 masm, receiver.Bit() | name.Bit() | value.Bit(), 0, x10); in GenerateStoreICDebugBreak()
267 masm, receiver.Bit() | name.Bit() | value.Bit(), 0, x10); in GenerateKeyedStoreICDebugBreak()
276 Generate_DebugBreakCallHelper(masm, x0.Bit(), 0, x10); in GenerateCompareNilICDebugBreak()
284 Generate_DebugBreakCallHelper(masm, x0.Bit(), 0, x10); in GenerateReturnDebugBreak()
293 Generate_DebugBreakCallHelper(masm, x1.Bit(), 0, x10); in GenerateCallFunctionStubDebugBreak()
303 Generate_DebugBreakCallHelper(masm, x1.Bit(), x0.Bit(), x10); in GenerateCallConstructStubDebugBreak()
[all …]
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| D | assembler-arm64.h | 58 RegList Bit() const;
281 return (Bit() & kAllocatableFPRegisters) != 0; in IsAllocatable()
452 : list_(reg1.Bit() | reg2.Bit() | reg3.Bit() | reg4.Bit()),
542 if (!other1.IsNone() && (other1.type() == type_)) list |= other1.Bit();
543 if (!other2.IsNone() && (other2.type() == type_)) list |= other2.Bit();
544 if (!other3.IsNone() && (other3.type() == type_)) list |= other3.Bit();
545 if (!other4.IsNone() && (other4.type() == type_)) list |= other4.Bit();
|
| /external/chromium_org/v8/src/arm/ |
| D | constants-arm.h | 453 inline int Bit(int nr) const { in Bit() function
470 static inline int Bit(Instr instr, int nr) { in Bit() function
523 inline int NValue() const { return Bit(7); } in NValue()
524 inline int MValue() const { return Bit(5); } in MValue()
525 inline int DValue() const { return Bit(22); } in DValue()
527 inline int PValue() const { return Bit(24); } in PValue()
528 inline int UValue() const { return Bit(23); } in UValue()
529 inline int Opc1Value() const { return (Bit(23) << 2) | Bits(21, 20); } in Opc1Value()
532 inline int SzValue() const { return Bit(8); } in SzValue()
533 inline int VLValue() const { return Bit(20); } in VLValue()
[all …]
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| D | disasm-arm.cc | 240 shift_names[instr->Bit(6) * 2], in PrintShiftSat()
364 (instr->Bit(24) == 0x0) && in FormatVFPRegister()
366 (instr->Bit(4) == 0x1)) { in FormatVFPRegister()
368 reg = instr->Bits(19, 16) | (instr->Bit(7) << 4); in FormatVFPRegister()
451 if (instr->Bit(21) == 0) { in FormatOption()
477 if (instr->Bit(21) == 0) { in FormatOption()
527 if ((instr->Bits(27, 25) == 0) && (instr->Bit(20) == 0) && in FormatOption()
528 (instr->Bits(7, 6) == 3) && (instr->Bit(4) == 1)) { in FormatOption()
529 if (instr->Bit(5) == 1) { in FormatOption()
638 if (instr->Bit(22) == 0) { in FormatOption()
[all …]
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| D | constants-arm.cc | 25 high16 |= (0xff * Bit(18)) << 6; // xxbbbbbb,bbxxxxxx. in DoubleImmedVmov()
26 high16 |= (Bit(18) ^ 1) << 14; // xBxxxxxx,xxxxxxxx. in DoubleImmedVmov()
27 high16 |= Bit(19) << 15; // axxxxxxx,xxxxxxxx. in DoubleImmedVmov()
|
| D | simulator-arm.cc | 1352 if (instr->Bit(4) == 0) { in GetShiftRm()
2006 if (instr->Bit(24) == 0) { in DecodeType01()
2014 if (instr->Bit(23) == 0) { in DecodeType01()
2015 if (instr->Bit(21) == 0) { in DecodeType01()
2029 if (instr->Bit(22) == 0) { in DecodeType01()
2060 if (instr->Bit(22) == 1) { in DecodeType01()
2089 if (instr->Bit(22) == 0) { in DecodeType01()
2177 if (((instr->Bits(7, 4) & 0xd) == 0xd) && (instr->Bit(20) == 0)) { in DecodeType01()
2567 if (instr->Bit(4) == 0) { in DecodeType3()
2570 if (instr->Bit(5) == 0) { in DecodeType3()
[all …]
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMUnwindOpAsm.cpp | 77 for (uint32_t Bit = (1u << 5); Bit < (1u << 12); Bit <<= 1) { in EmitRegSave() local
78 if ((RegSave & Bit) == 0u) in EmitRegSave()
81 Mask |= Bit; in EmitRegSave()
111 uint32_t Bit = 1u << (i - 1); in EmitVFPRegSave() local
112 if ((VFPRegSave & Bit) == 0u) { in EmitVFPRegSave()
120 Bit >>= 1; in EmitVFPRegSave()
122 while (i > 16 && (VFPRegSave & Bit)) { in EmitVFPRegSave()
125 Bit >>= 1; in EmitVFPRegSave()
133 uint32_t Bit = 1u << (i - 1); in EmitVFPRegSave() local
134 if ((VFPRegSave & Bit) == 0u) { in EmitVFPRegSave()
[all …]
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| /external/chromium_org/ppapi/native_client/tests/breakpad_crash_test/ |
| D | nacl.scons | 10 if env.Bit('host_windows') or env.Bit('host_mac'):
19 if env.Bit('host_windows') and env.Bit('build_x86_64'):
48 env.Bit('host_linux') or env.Bit('host_mac') or
49 env.Bit('running_on_valgrind')))
69 # env.Bit('running_on_valgrind'))
88 # env.Bit('running_on_valgrind') or
89 # (env.Bit('host_windows') and env.Bit('build_x86_32')))
107 env.Bit('running_on_valgrind') or
108 env.Bit('host_linux'))
|
| /external/chromium_org/ppapi/native_client/ |
| D | chrome_main.scons | 72 if env.Bit('browser_headless') and env.Bit('host_linux'):
112 if env.Bit('mac'):
116 if allow_64bit_redirect and env.Bit('target_x86_64'):
123 if env.Bit('windows'):
125 elif env.Bit('mac'):
180 if not env.Bit('nacl_glibc'):
228 if env.Bit('nacl_static_link'):
316 if env.Bit('nacl_static_link'):
344 if not env.Bit('nacl_glibc'):
474 if env.Bit('disable_flaky_tests') and '--debug' in args:
[all …]
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| /external/clang/test/Parser/ |
| D | MicrosoftExtensionsInlineAsm.c | 5 void __forceinline InterlockedBitTestAndSet (long *Base, long Bit) in InterlockedBitTestAndSet() argument
8 mov eax, Bit in InterlockedBitTestAndSet()
|
| /external/chromium_org/ppapi/native_client/src/untrusted/irt_stub/ |
| D | nacl.scons | 19 if not env.Bit('nacl_disable_shared'):
21 if env.Bit('bitcode'):
|
| /external/llvm/docs/CommandGuide/ |
| D | llvm-bcanalyzer.rst | 207 The total number of 32-bit integers encoded using the Variable Bit Rate
212 The total number of 64-bit integers encoded using the Variable Bit Rate encoding
218 the Variable Bit Rate encoding scheme.
223 integers had they not been compressed with the Variable Bit Rage encoding
228 The total number of bytes saved by using the Variable Bit Rate encoding scheme.
288 integers that use the Variable Bit Rate encoding scheme.
294 Bit Rate encoding scheme.
298 The total number of bytes saved in this function by using the Variable Bit
|
| /external/llvm/include/llvm/TableGen/ |
| D | Record.h | 543 virtual Init *getBit(unsigned Bit) const = 0;
613 Init *getBit(unsigned Bit) const override { in getBit() argument
643 Init *getBit(unsigned Bit) const override { in getBit() argument
644 assert(Bit < 1 && "Bit index out of range!"); in getBit()
693 Init *getBit(unsigned Bit) const override { in getBit() argument
694 assert(Bit < Bits.size() && "Bit index out of range!"); in getBit()
695 return Bits[Bit]; in getBit()
734 Init *getBit(unsigned Bit) const override { in getBit() argument
735 return BitInit::get((Value & (1ULL << Bit)) != 0); in getBit()
774 Init *getBit(unsigned Bit) const override { in getBit() argument
[all …]
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| /external/chromium_org/ppapi/native_client/tests/nacl_browser/inbrowser_test_runner/ |
| D | nacl.scons | 48 env.Bit('running_on_valgrind') or
53 if not env.Bit('tests_use_irt'):
|
| /external/llvm/lib/TableGen/ |
| D | Record.cpp | 219 if (BitInit *Bit = dyn_cast<BitInit>(BI->getBit(i))) { in convertValue() local
220 Result |= Bit->getValue() << i; in convertValue()
495 if (Init *Bit = getBit(e-i-1)) in getAsString() local
496 Result += Bit->getAsString(); in getAsString()
531 Init *Bit = CachedInit->getBit(CurBit->getBitNum()); in resolveReferences() local
532 NewBits[i] = fixBitInit(RV, CurBit, Bit); in resolveReferences()
549 Init *Bit = CurBitVar->getBit(CurBit->getBitNum()); in resolveReferences() local
550 NewBits[i] = fixBitInit(RV, CurBit, Bit); in resolveReferences()
734 Init *OpInit::getBit(unsigned Bit) const { in getBit()
737 return VarBitInit::get(const_cast<OpInit*>(this), Bit); in getBit()
[all …]
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| D | TGLexer.h | 46 Bit, Bits, Class, Code, Dag, Def, Foreach, Defm, Field, In, Int, Let, List, enumerator
|
| /external/chromium_org/v8/test/cctest/ |
| D | test-assembler-arm64.cc | 6067 masm.FPTmpList()->set_list(d0.Bit()); in TEST()
6089 masm.FPTmpList()->set_list(d0.Bit()); in TEST()
8239 CHECK(x0.Bit() == (1UL << 0)); in TEST()
8240 CHECK(x1.Bit() == (1UL << 1)); in TEST()
8241 CHECK(x10.Bit() == (1UL << 10)); in TEST()
8244 CHECK(fp.Bit() == (1UL << kFramePointerRegCode)); in TEST()
8245 CHECK(lr.Bit() == (1UL << kLinkRegCode)); in TEST()
8248 CHECK(xzr.Bit() == (1UL << kZeroRegCode)); in TEST()
8251 CHECK(jssp.Bit() == (1UL << kJSSPCode)); in TEST()
8252 CHECK(csp.Bit() == (1UL << kSPRegInternalCode)); in TEST()
[all …]
|
| /external/vixl/test/ |
| D | test-assembler-a64.cc | 7427 assert(x0.Bit() == (UINT64_C(1) << 0)); in TEST()
7428 assert(x1.Bit() == (UINT64_C(1) << 1)); in TEST()
7429 assert(x10.Bit() == (UINT64_C(1) << 10)); in TEST()
7432 assert(lr.Bit() == (UINT64_C(1) << kLinkRegCode)); in TEST()
7435 assert(xzr.Bit() == (UINT64_C(1) << kZeroRegCode)); in TEST()
7438 assert(sp.Bit() == (UINT64_C(1) << kSPRegInternalCode)); in TEST()
7439 assert(sp.Bit() != xzr.Bit()); in TEST()
7442 assert(x0.Bit() == w0.Bit()); in TEST()
7443 assert(x1.Bit() == w1.Bit()); in TEST()
7444 assert(x10.Bit() == w10.Bit()); in TEST()
[all …]
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| /external/antlr/antlr-3.4/runtime/ObjC/Framework/test/runtime/sets/ |
| D | ANTLRBitSetTest.m | 69 STAssertTrue([bitSet member:1], @"Bit at index 1 is not a member...");
73 STAssertFalse([bitSet member:1], @"Bit at index 1 is a member...");
|
| /external/chromium_org/ppapi/native_client/tests/nacl_browser/browser_dynamic_library/ |
| D | nacl.scons | 10 if env.Bit('nacl_static_link'):
|
| /external/clang/include/clang/Basic/ |
| D | BuiltinsAArch64.def | 26 // Bit manipulation
|
| /external/llvm/lib/Target/R600/ |
| D | R600Packetizer.cpp | 229 void setIsLastBit(MachineInstr *MI, unsigned Bit) const { in setIsLastBit()
231 MI->getOperand(LastOp).setImm(Bit); in setIsLastBit()
|