| /external/llvm/lib/CodeGen/ |
| D | CallingConvLower.cpp | 26 CCState::CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &mf, in CCState() function in CCState
42 void CCState::HandleByVal(unsigned ValNo, MVT ValVT, in HandleByVal()
59 void CCState::MarkAllocated(unsigned Reg) { in MarkAllocated()
67 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
86 bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in CheckReturn()
100 void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeReturn()
118 void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands()
136 void CCState::AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs, in AnalyzeCallOperands()
155 void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeCallResult()
172 void CCState::AnalyzeCallResult(MVT VT, CCAssignFn Fn) { in AnalyzeCallResult()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMCallingConv.h | 30 CCState &State, bool CanFail) { in f64AssignAPCS()
61 CCState &State) { in CC_ARM_APCS_Custom_f64()
73 CCState &State, bool CanFail) { in f64AssignAAPCS()
115 CCState &State) { in CC_ARM_AAPCS_Custom_f64()
125 CCValAssign::LocInfo &LocInfo, CCState &State) { in f64RetAssign()
147 CCState &State) { in RetCC_ARM_APCS_Custom_f64()
158 CCState &State) { in RetCC_ARM_AAPCS_Custom_f64()
178 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_ARM_AAPCS_Custom_HA()
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| D | ARMISelLowering.h | 506 int StoreByValRegs(CCState &CCInfo, SelectionDAG &DAG,
517 void VarArgStyleRegisters(CCState &CCInfo, SelectionDAG &DAG,
523 void computeRegArea(CCState &CCInfo, MachineFunction &MF,
534 void HandleByVal(CCState *, unsigned &, unsigned) const override;
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| D | ARMFastISel.cpp | 1886 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, TM, ArgLocs, *Context); in ProcessCallArgs()
2029 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, TM, RVLocs, *Context); in FinishCall()
2090 CCState CCInfo(CC, F.isVarArg(), *FuncInfo.MF, TM, ValLocs,I->getContext()); in SelectRet()
2195 CCState CCInfo(CC, false, *FuncInfo.MF, TM, RVLocs, *Context); in ARMEmitLibcall()
2306 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, TM, RVLocs, *Context); in SelectCall()
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| D | ARMISelLowering.cpp | 70 class ARMCCState : public CCState {
75 : CCState(CC, isVarArg, MF, TM, locs, C) { in ARMCCState()
1791 CCState *State, unsigned &size, unsigned Align) const { in HandleByVal()
2041 CCState CCInfo(CallConv, isVarArg, MF, getTargetMachine(), RVLocs, Context); in CanLowerReturn()
2723 ARMTargetLowering::computeRegArea(CCState &CCInfo, MachineFunction &MF, in computeRegArea()
2777 ARMTargetLowering::StoreByValRegs(CCState &CCInfo, SelectionDAG &DAG, in StoreByValRegs()
2883 ARMTargetLowering::VarArgStyleRegisters(CCState &CCInfo, SelectionDAG &DAG, in VarArgStyleRegisters()
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| /external/llvm/include/llvm/CodeGen/ |
| D | CallingConvLower.h | 25 class CCState; variable
155 ISD::ArgFlagsTy ArgFlags, CCState &State);
162 ISD::ArgFlagsTy &ArgFlags, CCState &State);
172 class CCState {
240 CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF,
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| /external/llvm/lib/Target/X86/ |
| D | X86CallingConv.h | 25 CCState &) { in CC_X86_AnyReg_Error() argument
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| D | X86FastISel.cpp | 999 CCState CCInfo(CC, F.isVarArg(), *FuncInfo.MF, TM, ValLocs, in X86SelectRet()
2828 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, TM, ArgLocs, in DoSelectCall()
3058 CCState CCRetInfo(CC, false, *FuncInfo.MF, TM, RVLocs, in DoSelectCall()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 49 class HexagonCCState : public CCState {
56 : CCState(CC, isVarArg, MF, TM, locs, C), in HexagonCCState()
67 ISD::ArgFlagsTy ArgFlags, CCState &State);
72 ISD::ArgFlagsTy ArgFlags, CCState &State);
77 ISD::ArgFlagsTy ArgFlags, CCState &State);
82 ISD::ArgFlagsTy ArgFlags, CCState &State);
87 ISD::ArgFlagsTy ArgFlags, CCState &State);
92 ISD::ArgFlagsTy ArgFlags, CCState &State);
97 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_Hexagon_VarArg()
147 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_Hexagon()
[all …]
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 266 static void AnalyzeVarArgs(CCState &State, in AnalyzeVarArgs()
271 static void AnalyzeVarArgs(CCState &State, in AnalyzeVarArgs()
281 static void AnalyzeArguments(CCState &State, in AnalyzeArguments()
346 static void AnalyzeRetResult(CCState &State, in AnalyzeRetResult()
351 static void AnalyzeRetResult(CCState &State, in AnalyzeRetResult()
357 static void AnalyzeReturnValues(CCState &State, in AnalyzeReturnValues()
440 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerCCCArguments()
536 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerReturn()
586 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerCCCCallTo()
722 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerCallResult()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.h | 683 CCState &State);
689 CCState &State);
695 CCState &State);
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| D | PPCFastISel.cpp | 1203 CCState CCInfo(CC, IsVarArg, *FuncInfo.MF, TM, ArgLocs, *Context); in processCallArgs()
1321 CCState CCInfo(CC, IsVarArg, *FuncInfo.MF, TM, RVLocs, *Context); in finishCall()
1411 CCState CCInfo(CC, IsVarArg, *FuncInfo.MF, TM, RVLocs, *Context); in SelectCall()
1534 CCState CCInfo(CC, F.isVarArg(), *FuncInfo.MF, TM, ValLocs, *Context); in SelectRet()
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| D | PPCISelLowering.cpp | 2054 CCState &State) { in CC_PPC32_SVR4_Custom_Dummy()
2062 CCState &State) { in CC_PPC32_SVR4_Custom_AlignArgRegs()
2089 CCState &State) { in CC_PPC32_SVR4_Custom_AlignFPArgRegs()
2243 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerFormalArguments_32SVR4()
2317 CCState CCByValInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerFormalArguments_32SVR4()
3525 CCState CCRetInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerCallResult()
3738 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerCall_32SVR4()
3778 CCState CCByValInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerCall_32SVR4()
4754 CCState CCInfo(CallConv, isVarArg, MF, getTargetMachine(), in CanLowerReturn()
4767 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerReturn()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.h | 356 MipsCC(CallingConv::ID CallConv, bool IsO32, bool IsFP64, CCState &Info,
375 const CCState &getCCInfo() const { return CCInfo; } in getCCInfo()
428 CCState &CCInfo;
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| D | MipsISelLowering.cpp | 2212 CCState &State, const MCPhysReg *F64Regs) { in CC_MipsO32()
2288 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP32()
2296 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP64()
2409 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), in LowerCall()
2613 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), in LowerCallResult()
2661 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), in LowerFormalArguments()
2797 CCState CCInfo(CallConv, IsVarArg, MF, getTargetMachine(), in CanLowerReturn()
2814 CCState CCInfo(CallConv, IsVarArg, MF, getTargetMachine(), RVLocs, in LowerReturn()
3326 CallingConv::ID CC, bool IsO32_, bool IsFP64_, CCState &Info, in MipsCC()
3677 const CCState &CCInfo = CC.getCCInfo(); in writeVarArgRegs()
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| /external/llvm/lib/Target/R600/ |
| D | AMDGPUISelLowering.h | 101 void AnalyzeFormalArguments(CCState &State,
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| D | AMDGPUISelLowering.cpp | 77 ISD::ArgFlagsTy ArgFlags, CCState &State) { in allocateStack()
482 void AMDGPUTargetLowering::AnalyzeFormalArguments(CCState &State, in AnalyzeFormalArguments()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 41 ISD::ArgFlagsTy &ArgFlags, CCState &State) in CC_Sparc_Assign_SRet()
54 ISD::ArgFlagsTy &ArgFlags, CCState &State) in CC_Sparc_Assign_f64()
83 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_Sparc64_Full()
128 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_Sparc64_Half()
193 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), in LowerReturn_32()
253 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), in LowerReturn_64()
352 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerFormalArguments_32()
552 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), in LowerFormalArguments_64()
701 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerCall_32()
937 CCState RVInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerCall_32()
[all …]
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| /external/clang/lib/CodeGen/ |
| D | TargetInfo.cpp | 506 struct CCState { struct
507 CCState(unsigned CC) : CC(CC), FreeRegs(0) {} in CCState() argument
537 ABIArgInfo getIndirectResult(QualType Ty, bool ByVal, CCState &State) const;
539 ABIArgInfo getIndirectReturnResult(CCState &State) const;
545 ABIArgInfo classifyReturnType(QualType RetTy, CCState &State) const;
546 ABIArgInfo classifyArgumentType(QualType RetTy, CCState &State) const;
547 bool shouldUseInReg(QualType Ty, CCState &State, bool &NeedsPadding) const;
659 ABIArgInfo X86_32ABIInfo::getIndirectReturnResult(CCState &State) const { in getIndirectReturnResult()
669 ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy, CCState &State) const { in classifyReturnType()
791 CCState &State) const { in getIndirectResult()
[all …]
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 1121 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerCCCCallTo()
1132 CCState RetCCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerCCCCallTo()
1287 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerCCCArguments()
1446 CCState CCInfo(CallConv, isVarArg, MF, getTargetMachine(), RVLocs, Context); in CanLowerReturn()
1470 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerReturn()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 371 void saveVarArgRegisters(CCState &CCInfo, SelectionDAG &DAG, SDLoc DL,
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| D | AArch64FastISel.cpp | 1201 CCState CCInfo(CC, false, *FuncInfo.MF, TM, ArgLocs, *Context); in ProcessCallArgs()
1286 CCState CCInfo(CC, false, *FuncInfo.MF, TM, RVLocs, *Context); in FinishCall()
1575 CCState CCInfo(CC, F.isVarArg(), *FuncInfo.MF, TM, ValLocs, in SelectRet()
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| D | AArch64ISelLowering.cpp | 1653 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerFormalArguments()
1838 void AArch64TargetLowering::saveVarArgRegisters(CCState &CCInfo, in saveVarArgRegisters()
1923 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerCallResult()
2010 CCState CCInfo(CalleeCC, isVarArg, DAG.getMachineFunction(), in isEligibleForTailCallOptimization()
2023 CCState CCInfo1(CalleeCC, false, DAG.getMachineFunction(), in isEligibleForTailCallOptimization()
2028 CCState CCInfo2(CallerCC, false, DAG.getMachineFunction(), in isEligibleForTailCallOptimization()
2054 CCState CCInfo(CalleeCC, isVarArg, DAG.getMachineFunction(), in isEligibleForTailCallOptimization()
2152 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), in LowerCall()
2476 CCState CCInfo(CallConv, isVarArg, MF, getTargetMachine(), RVLocs, Context); in CanLowerReturn()
2490 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerReturn()
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| /external/llvm/include/llvm/Target/ |
| D | TargetLowering.h | 44 class CCState; variable
2266 virtual void HandleByVal(CCState *, unsigned &, unsigned) const {} in HandleByVal() argument
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 681 CCState CCInfo(CallConv, IsVarArg, MF, DAG.getTarget(), ArgLocs, in LowerFormalArguments()
785 static bool canUseSiblingCall(CCState ArgCCInfo, in canUseSiblingCall()
820 CCState ArgCCInfo(CallConv, IsVarArg, MF, DAG.getTarget(), ArgLocs, in LowerCall()
943 CCState RetCCInfo(CallConv, IsVarArg, MF, DAG.getTarget(), RetLocs, in LowerCall()
975 CCState RetCCInfo(CallConv, IsVarArg, MF, DAG.getTarget(), RetLocs, in LowerReturn()
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