/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeVectorTypes.cpp | 413 case ISD::CONCAT_VECTORS: in ScalarizeVectorOperand() 566 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break; in SplitVectorResult() 767 Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, LoVT, LoOps); in SplitVecRes_CONCAT_VECTORS() 770 Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HiVT, HiOps); in SplitVecRes_CONCAT_VECTORS() 1202 case ISD::CONCAT_VECTORS: Res = SplitVecOp_CONCAT_VECTORS(N); break; in SplitVectorOperand() 1274 return DAG.getNode(ISD::CONCAT_VECTORS, DL, Src0VT, LoSelect, HiSelect); in SplitVecOp_VSELECT() 1291 return DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Lo, Hi); in SplitVecOp_UnaryOp() 1479 SDValue InterVec = DAG.getNode(ISD::CONCAT_VECTORS, DL, InterVT, HalfLo, in SplitVecOp_TRUNCATE() 1503 SDValue Con = DAG.getNode(ISD::CONCAT_VECTORS, DL, WideResVT, LoRes, HiRes); in SplitVecOp_VSETCC() 1522 return DAG.getNode(ISD::CONCAT_VECTORS, DL, ResVT, Lo, Hi); in SplitVecOp_FP_ROUND() [all …]
|
D | SelectionDAGDumper.cpp | 199 case ISD::CONCAT_VECTORS: return "concat_vectors"; in getOperationName()
|
D | DAGCombiner.cpp | 1267 case ISD::CONCAT_VECTORS: return visitCONCAT_VECTORS(N); in visit() 4621 assert(LHS.getOpcode() == ISD::CONCAT_VECTORS && in ConvertSelectToConcatVector() 4622 RHS.getOpcode() == ISD::CONCAT_VECTORS && in ConvertSelectToConcatVector() 4657 ISD::CONCAT_VECTORS, dl, VT, in ConvertSelectToConcatVector() 4724 return DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, Lo, Hi); in visitVSELECT() 4737 if (N1.getOpcode() == ISD::CONCAT_VECTORS && in visitVSELECT() 4738 N2.getOpcode() == ISD::CONCAT_VECTORS && in visitVSELECT() 6091 if (N0.getOpcode() == ISD::CONCAT_VECTORS && !LegalTypes) { in visitTRUNCATE() 6127 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(N), VT, Opnds); in visitTRUNCATE() 10309 VecIn1 = DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, in visitBUILD_VECTOR() [all …]
|
D | LegalizeIntegerTypes.cpp | 92 case ISD::CONCAT_VECTORS: in PromoteIntegerResult() 643 return DAG.getNode(ISD::CONCAT_VECTORS, dl, NVT, EOp1, EOp2); in PromoteIntRes_TRUNCATE() 813 case ISD::CONCAT_VECTORS: Res = PromoteIntOp_CONCAT_VECTORS(N); break; in PromoteIntegerOperand()
|
D | SelectionDAGBuilder.cpp | 280 Val = DAG.getNode(IntermediateVT.isVector() ? ISD::CONCAT_VECTORS in getCopyFromPartsVector() 3106 setValue(&I, DAG.getNode(ISD::CONCAT_VECTORS, getCurSDLoc(), in visitShuffleVector() 3114 setValue(&I, DAG.getNode(ISD::CONCAT_VECTORS, getCurSDLoc(), in visitShuffleVector() 3131 Src1 = Src1U ? DAG.getUNDEF(VT) : DAG.getNode(ISD::CONCAT_VECTORS, in visitShuffleVector() 3133 Src2 = Src2U ? DAG.getUNDEF(VT) : DAG.getNode(ISD::CONCAT_VECTORS, in visitShuffleVector()
|
D | SelectionDAG.cpp | 2779 case ISD::CONCAT_VECTORS: in getNode() 3081 case ISD::CONCAT_VECTORS: in getNode() 3275 N1.getOpcode() == ISD::CONCAT_VECTORS && in getNode() 3556 case ISD::CONCAT_VECTORS: in getNode()
|
D | LegalizeDAG.cpp | 3303 case ISD::CONCAT_VECTORS: { in ExpandNode()
|
/external/llvm/test/CodeGen/X86/ |
D | widen_shuffle-1.ll | 55 ; PR10421: make sure we correctly handle extreme widening with CONCAT_VECTORS 64 ; PR11389: another CONCAT_VECTORS case
|
/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 262 CONCAT_VECTORS, enumerator
|
/external/llvm/lib/Target/R600/ |
D | AMDGPUISelLowering.cpp | 206 setOperationAction(ISD::CONCAT_VECTORS, MVT::v4i32, Custom); in AMDGPUTargetLowering() 207 setOperationAction(ISD::CONCAT_VECTORS, MVT::v4f32, Custom); in AMDGPUTargetLowering() 208 setOperationAction(ISD::CONCAT_VECTORS, MVT::v8i32, Custom); in AMDGPUTargetLowering() 209 setOperationAction(ISD::CONCAT_VECTORS, MVT::v8f32, Custom); in AMDGPUTargetLowering() 530 case ISD::CONCAT_VECTORS: return LowerCONCAT_VECTORS(Op, DAG); in LowerOperation()
|
D | SIISelLowering.cpp | 191 case ISD::CONCAT_VECTORS: in SITargetLowering()
|
/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 357 setTargetDAGCombine(ISD::CONCAT_VECTORS); in AArch64TargetLowering() 520 setOperationAction(ISD::CONCAT_VECTORS, VT.getSimpleVT(), Legal); in addTypeForNEON() 4197 ShuffleSrcs[i] = DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, CurSource, in ReconstructShuffle() 4538 return DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, V0, V1); in tryFormConcatFromShuffle() 4675 V1Cst = DAG.getNode(ISD::CONCAT_VECTORS, DL, MVT::v16i8, V1Cst, V1Cst); in GenerateTBL() 4683 V1Cst = DAG.getNode(ISD::CONCAT_VECTORS, DL, MVT::v16i8, V1Cst, V2Cst); in GenerateTBL() 4760 } else if (V1.getOpcode() == ISD::CONCAT_VECTORS) { in LowerVECTOR_SHUFFLE() 6697 DAG.getNode(ISD::CONCAT_VECTORS, dl, ConcatTy, in performConcatVectorsCombine() 7229 return DAG.getNode(ISD::CONCAT_VECTORS, DL, ResVT, Lo, Hi); in performExtendCombine() 7730 case ISD::CONCAT_VECTORS: in PerformDAGCombine()
|
D | AArch64InstrFormats.td | 7313 // intrinsic, represented by CONCAT_VECTORS.
|
/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 1304 setOperationAction(ISD::CONCAT_VECTORS, VT, Custom); in resetOperationActions() 1401 setOperationAction(ISD::CONCAT_VECTORS, MVT::v8f64, Custom); in resetOperationActions() 1402 setOperationAction(ISD::CONCAT_VECTORS, MVT::v8i64, Custom); in resetOperationActions() 1403 setOperationAction(ISD::CONCAT_VECTORS, MVT::v16f32, Custom); in resetOperationActions() 1404 setOperationAction(ISD::CONCAT_VECTORS, MVT::v16i32, Custom); in resetOperationActions() 1405 setOperationAction(ISD::CONCAT_VECTORS, MVT::v8i1, Custom); in resetOperationActions() 1406 setOperationAction(ISD::CONCAT_VECTORS, MVT::v16i1, Legal); in resetOperationActions() 5086 V1 = DAG.getNode(ISD::CONCAT_VECTORS, dl, SrcVT, V1, V1); in PromoteSplat() 6228 return DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, LO, HI); in ExpandHorizontalBinOp() 8753 return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, Output[0], Output[1]); in LowerVECTOR_SHUFFLE_256() [all …]
|
/external/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 740 setOperationAction(ISD::CONCAT_VECTORS, (MVT::SimpleValueType)VT, Expand); in initActions()
|
/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 117 setOperationAction(ISD::CONCAT_VECTORS, VT, Legal); in addTypeForNEON() 5973 N0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v8i16, N0, N2); in LowerSDIV() 6008 N0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v8i16, N0, N2); in LowerUDIV() 6238 case ISD::CONCAT_VECTORS: return LowerCONCAT_VECTORS(Op, DAG); in LowerOperation() 8783 if (Op0.getOpcode() != ISD::CONCAT_VECTORS || in PerformVECTOR_SHUFFLECombine() 8784 Op1.getOpcode() != ISD::CONCAT_VECTORS || in PerformVECTOR_SHUFFLECombine() 8801 SDValue NewConcat = DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(N), VT, in PerformVECTOR_SHUFFLECombine()
|
D | ARMISelDAGToDAG.cpp | 3290 case ISD::CONCAT_VECTORS: in Select()
|
/external/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 467 def concat_vectors : SDNode<"ISD::CONCAT_VECTORS",
|
/external/llvm/lib/Target/NVPTX/ |
D | NVPTXISelLowering.cpp | 1411 case ISD::CONCAT_VECTORS: in LowerOperation()
|