Searched refs:COP1 (Results 1 – 10 of 10) sorted by relevance
/external/chromium_org/v8/src/mips/ |
D | assembler-mips.cc | 510 (opcode == COP1 && rs_field == BC1) || // Coprocessor branch. in IsBranch() 511 (opcode == COP1 && rs_field == BC1EQZ) || in IsBranch() 512 (opcode == COP1 && rs_field == BC1NEZ); in IsBranch() 2011 GenInstrRegister(COP1, MTC1, rt, fs, f0); in mtc1() 2016 GenInstrRegister(COP1, MTHC1, rt, fs, f0); in mthc1() 2021 GenInstrRegister(COP1, MFC1, rt, fs, f0); in mfc1() 2026 GenInstrRegister(COP1, MFHC1, rt, fs, f0); in mfhc1() 2031 GenInstrRegister(COP1, CTC1, rt, fs); in ctc1() 2036 GenInstrRegister(COP1, CFC1, rt, fs); in cfc1() 2052 GenInstrRegister(COP1, D, ft, fs, fd, ADD_D); in add_d() [all …]
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D | constants-mips.cc | 278 case COP1: // Coprocessor instructions. in InstructionType()
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D | constants-mips.h | 334 COP1 = ((2 << 3) + 1) << kOpcodeShift, // Coprocessor 1 class. enumerator 879 case COP1: in SecondaryValue()
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D | disasm-mips.cc | 454 case COP1: // Coprocessor instructions. in DecodeTypeRegister() 859 case COP1: in DecodeTypeImmediate()
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D | simulator-mips.cc | 1888 case COP1: // Coprocessor instructions. in ConfigureTypeRegister() 2179 case COP1: in DecodeTypeRegister() 2717 case COP1: in DecodeTypeImmediate()
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/external/chromium_org/v8/src/mips64/ |
D | assembler-mips64.cc | 488 (opcode == COP1 && rs_field == BC1) || // Coprocessor branch. in IsBranch() 489 (opcode == COP1 && rs_field == BC1EQZ) || in IsBranch() 490 (opcode == COP1 && rs_field == BC1NEZ); in IsBranch() 2122 Instr instr = COP1 | fmt << kRsShift | ft.code() << kFtShift | in sel() 2142 Instr instr = COP1 | fmt << kRsShift | ft.code() << kFtShift | in seleqz() 2162 Instr instr = COP1 | fmt << kRsShift | ft.code() << kFtShift | in selnez() 2227 GenInstrRegister(COP1, MTC1, rt, fs, f0); in mtc1() 2232 GenInstrRegister(COP1, MTHC1, rt, fs, f0); in mthc1() 2237 GenInstrRegister(COP1, DMTC1, rt, fs, f0); in dmtc1() 2242 GenInstrRegister(COP1, MFC1, rt, fs, f0); in mfc1() [all …]
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D | constants-mips64.cc | 295 case COP1: // Coprocessor instructions. in InstructionType()
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D | constants-mips64.h | 300 COP1 = ((2 << 3) + 1) << kOpcodeShift, // Coprocessor 1 class. enumerator 893 case COP1: in SecondaryValue()
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D | disasm-mips64.cc | 479 case COP1: // Coprocessor instructions. in DecodeTypeRegister() 979 case COP1: in DecodeTypeImmediate()
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D | simulator-mips64.cc | 1955 case COP1: // Coprocessor instructions. in ConfigureTypeRegister() 2310 case COP1: in DecodeTypeRegister() 2848 case COP1: in DecodeTypeImmediate()
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