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Searched refs:CP0C3_VInt (Results 1 – 2 of 2) sorted by relevance

/external/qemu/target-mips/
Dtranslate_init.c45 (0 << CP0C3_VEIC) | (0 << CP0C3_VInt) | (0 << CP0C3_SP) | \
188 .CP0_Config3 = MIPS_CONFIG3 | (0 << CP0C3_VInt),
228 .CP0_Config3 = MIPS_CONFIG3 | (0 << CP0C3_VInt),
249 .CP0_Config3 = MIPS_CONFIG3 | (0 << CP0C3_VInt),
272 .CP0_Config3 = MIPS_CONFIG3 | (0 << CP0C3_VInt) | (1 << CP0C3_MT),
Dcpu.h375 #define CP0C3_VInt 5 macro