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Searched refs:CP0MVPC0_GS (Results 1 – 2 of 2) sorted by relevance

/external/qemu/target-mips/
Dtranslate_init.c538 (0 << CP0MVPC0_GS) | (1 << CP0MVPC0_PCP) | in mvp_init()
Dcpu.h126 #define CP0MVPC0_GS 28 macro