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Searched refs:CP0MVPC0_TLBS (Results 1 – 2 of 2) sorted by relevance

/external/qemu/target-mips/
Dtranslate_init.c537 env->mvp->CP0_MVPConf0 = (1 << CP0MVPC0_M) | (1 << CP0MVPC0_TLBS) | in mvp_init()
Dcpu.h125 #define CP0MVPC0_TLBS 29 macro