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Searched refs:CP0SRSCtl_HSS (Results 1 – 2 of 2) sorted by relevance

/external/qemu/target-mips/
Dtranslate_init.c288 .CP0_SRSCtl = (0xf << CP0SRSCtl_HSS),
Dcpu.h302 #define CP0SRSCtl_HSS 26 macro