| /external/libhevc/decoder/arm/ |
| D | ihevcd_fmt_conv_420sp_to_rgba8888.s | 226 VQMOVUN.S16 D14,Q7
231 VZIP.8 D14,D15
248 VST1.32 D14,[R2]!
277 VQMOVUN.S16 D14,Q7
282 VZIP.8 D14,D15
299 VST1.32 D14,[R8]!
357 VQMOVUN.S16 D14,Q7
362 VZIP.8 D14,D15
379 VST1.32 D14,[R2]!
399 VQMOVUN.S16 D14,Q7
[all …]
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| /external/libhevc/common/arm/ |
| D | ihevc_sao_band_offset_chroma.s | 166 VCLE.U8 D14,D3,D30 @vcle_u8(band_table.val[2], vdup_n_u8(16))
168 VORR.U8 D3,D3,D14 @band_table.val[2] = vorr_u8(band_table.val[2], au1_cmp)
180 VAND.U8 D3,D3,D14 @band_table.val[2] = vand_u8(band_table.val[2], au1_cmp)
207 …VADD.I8 D14,D10,D30 @band_table_v.val[1] = vadd_u8(band_table_v.val[1], band_p…
219 …VADD.I8 D10,D14,D28 @band_table_v.val[1] = vadd_u8(band_table_v.val[1], vdup_n…
289 VLD2.8 {D13,D14},[r5] @vld1q_u8(pu1_src_cpy)
299 VSUB.I8 D16,D14,D30 @vsub_u8(au1_cur_row_deint.val[1], band_pos_v)
307 …VTBX.8 D14,{D9-D12},D16 @vtbx4_u8(au1_cur_row_deint.val[1], band_table_v, vsub_u8(…
316 VST2.8 {D13,D14},[r5] @vst1q_u8(pu1_src_cpy, au1_cur_row)
343 VLD2.8 {D13,D14},[r5] @vld1q_u8(pu1_src_cpy)
[all …]
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| D | ihevc_sao_edge_offset_class0_chroma.s | 176 …VMOV.8 D14[0],r11 @pu1_cur_row_tmp = vsetq_lane_u8(pu1_src_cpy[16], pu1_cur_…
184 …VMOV.8 D14[1],r11 @pu1_cur_row_tmp = vsetq_lane_u8(pu1_src_cpy[17], pu1_cur_…
203 VTBL.8 D14,{D10},D14 @vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
211 VUZP.8 D14,D15
214 VTBL.8 D16,{D11},D14 @offset = vtbl1_s8(offset_tbl_u, vget_low_s8(edge_idx))
239 VMOVN.I16 D14,Q9 @vmovn_s16(pi2_tmp_cur_row.val[0])
261 VST1.8 {D14,D15},[r12],r1 @vst1q_u8(pu1_src_cpy, pu1_cur_row)
336 …VMOV.8 D14[0],r11 @pu1_cur_row_tmp = vsetq_lane_u8(pu1_src_cpy[16], pu1_cur_…
343 …VMOV.8 D14[1],r11 @pu1_cur_row_tmp = vsetq_lane_u8(pu1_src_cpy[17], pu1_cur_…
368 VTBL.8 D14,{D10},D14 @vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
[all …]
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| D | ihevc_sao_edge_offset_class0.s | 173 …VMOV.8 D14[0],r11 @pu1_cur_row_tmp = vsetq_lane_u8(pu1_src_cpy[16], pu1_cur_…
202 VTBL.8 D14,{D10},D14 @vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
210 VTBL.8 D16,{D11},D14 @offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx))
302 …VMOV.8 D14[0],r11 @pu1_cur_row_tmp = vsetq_lane_u8(pu1_src_cpy[16], pu1_cur_…
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| D | ihevc_sao_band_offset_luma.s | 200 VSUB.I8 D14,D13,D31 @vsub_u8(au1_cur_row, band_pos)
202 …VTBX.8 D13,{D1-D4},D14 @vtbx4_u8(au1_cur_row, band_table, vsub_u8(au1_cur_row, ba…
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| D | ihevc_sao_edge_offset_class2_chroma.s | 393 …VMOV.8 D14[0],r8 @I sign_up = sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[0] -…
397 …VMOV.8 D14[1],r4 @I sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[1] - pu1_src_l…
479 …VMOV.8 D14[0],r8 @II sign_up = sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[0] …
495 …VMOV.8 D14[1],r11 @II sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[1] - pu1_src_…
532 …VMOV.8 D14[1],r10 @III sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[1] - pu1_src…
616 …VMOV.8 D14[0],r8 @sign_up = sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[0] - p…
627 …VMOV.8 D14[1],r4 @sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[1] - pu1_src_lef…
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| /external/llvm/test/MC/MachO/ |
| D | x86_32-symbols.s | 47 D14: label
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| /external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/neon/ |
| D | armSP_FFT_CToC_SC16_Radix4_ls_unsafe_s.S | 120 #define dTmp2S32 D14.S32
129 #define dYr3 D14.S16
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| D | armSP_FFT_CToC_FC32_Radix8_fs_unsafe_s.S | 85 #define dXr7 D14.F32
173 #define dT0 D14.F32
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| D | armSP_FFT_CToC_FC32_Radix4_fs_unsafe_s.S | 85 #define dYr3 D14.F32
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| D | armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_unsafe_s.S | 106 #define qT1 D14.F32
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| D | armSP_FFT_CToC_SC16_Radix4_fs_unsafe_s.S | 93 #define dYr3 D14.S16
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| D | armSP_FFT_CToC_SC32_Radix8_fs_unsafe_s.S | 95 #define dXr7 D14.S32
187 #define dT0 D14.S32
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| D | armSP_FFT_CToC_SC32_Radix4_fs_unsafe_s.S | 93 #define dYr3 D14.S32
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| D | armSP_FFT_CToC_FC32_Radix4_ls_unsafe_s.S | 110 #define dZr0 D14.F32
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| D | armSP_FFT_CToC_FC32_Radix4_unsafe_s.S | 93 #define dYr1 D14.F32
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| D | armSP_FFT_CToC_SC16_Radix4_unsafe_s.S | 100 #define dYr1 D14.S16
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| D | armSP_FFT_CToC_SC32_Radix4_ls_unsafe_s.S | 118 #define dZr0 D14.S32
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| D | armSP_FFT_CToC_SC32_Radix4_unsafe_s.S | 102 #define dYr1 D14.S32
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonRegisterInfo.td | 117 def D14 : Rd<28, "r29:28", [R28, R29]>, DwarfRegNum<[60]>;
154 (sequence "D%u", 6, 13), D5, D14, D15)>;
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| D | HexagonRegisterInfo.cpp | 79 Reserved.set(Hexagon::D14); in getReservedRegs()
|
| /external/chromium_org/sdch/open-vcdiff/vsprojects/ |
| D | open-vcdiff.sln | 63 …decodetable_test", "decodetable_test\decodetable_test.vcproj", "{CCA8B377-0D14-4AD3-B5D8-7DD935A2D…
212 {CCA8B377-0D14-4AD3-B5D8-7DD935A2D6D8}.Debug|Win32.ActiveCfg = Debug|Win32
213 {CCA8B377-0D14-4AD3-B5D8-7DD935A2D6D8}.Debug|Win32.Build.0 = Debug|Win32
214 {CCA8B377-0D14-4AD3-B5D8-7DD935A2D6D8}.Release|Win32.ActiveCfg = Release|Win32
215 {CCA8B377-0D14-4AD3-B5D8-7DD935A2D6D8}.Release|Win32.Build.0 = Release|Win32
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.h | 67 case D15: case D14: case D13: case D12: in isARMArea3Register()
|
| /external/llvm/lib/Target/Sparc/ |
| D | SparcRegisterInfo.td | 143 def D14 : Rd<28, "F28", [F28, F29]>, DwarfRegNum<[86]>;
173 def Q7 : Rq<28, "F28", [D14, D15]>;
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| /external/valgrind/main/memcheck/ |
| D | mc_machine.c | 916 if (o >= GOF(D14) && o+sz <= GOF(D14)+SZB(D14)) return GOF(D14); in get_otrack_shadow_offset_wrk()
945 if (o >= GOF(D14) && o+sz <= GOF(D14)+2*SZB(D14)) return GOF(D14); // Q7 in get_otrack_shadow_offset_wrk()
|