| /external/libhevc/decoder/arm/ |
| D | ihevcd_fmt_conv_420sp_to_rgba8888.s | 229 VMOV.I8 D17,#0
232 VZIP.8 D16,D17
253 VST1.32 D17,[R2]!
280 VMOV.I8 D17,#0
283 VZIP.8 D16,D17
304 VST1.32 D17,[R8]!
360 VMOV.I8 D17,#0
363 VZIP.8 D16,D17
384 VST1.32 D17,[R2]!
402 VMOV.I8 D17,#0
[all …]
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| /external/libhevc/common/arm/ |
| D | ihevc_sao_band_offset_chroma.s | 232 VCLE.U8 D17,D12,D29 @vcle_u8(band_table.val[3], vdup_n_u8(16))
234 VORR.U8 D12,D12,D17 @band_table.val[3] = vorr_u8(band_table.val[3], au1_cmp)
244 VAND.U8 D12,D12,D17 @band_table.val[3] = vand_u8(band_table.val[3], au1_cmp)
292 VLD2.8 {D17,D18},[r6] @vld1q_u8(pu1_src_cpy)
302 VSUB.I8 D19,D17,D31 @vsub_u8(au1_cur_row_deint.val[0], band_pos_u)
314 …VTBX.8 D17,{D1-D4},D19 @vtbx4_u8(au1_cur_row_deint.val[0], band_table_u, vsub_u8(…
322 VST2.8 {D17,D18},[r6],r1 @vst1q_u8(pu1_src_cpy, au1_cur_row)
346 VLD2.8 {D17,D18},[r6] @vld1q_u8(pu1_src_cpy)
356 VSUB.I8 D19,D17,D31 @vsub_u8(au1_cur_row_deint.val[0], band_pos_u)
364 …VTBX.8 D17,{D1-D4},D19 @vtbx4_u8(au1_cur_row_deint.val[0], band_table_u, vsub_u8(…
[all …]
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| D | ihevc_sao_band_offset_luma.s | 197 VLD1.8 D17,[r6] @au1_cur_row = vld1_u8(pu1_src_cpy)
206 VSUB.I8 D18,D17,D31 @vsub_u8(au1_cur_row, band_pos)
208 …VTBX.8 D17,{D1-D4},D18 @vtbx4_u8(au1_cur_row, band_table, vsub_u8(au1_cur_row, ba…
217 VST1.8 D17,[r6],r1 @vst1_u8(pu1_src_cpy, au1_cur_row)
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| D | ihevc_sao_edge_offset_class0_chroma.s | 218 VTBL.8 D17,{D0},D15
221 VZIP.S8 D16,D17
233 …VADDW.S8 Q6,Q6,D17 @pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[1],…
383 VTBL.8 D17,{D0},D15
386 VZIP.S8 D16,D17
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| D | ihevc_sao_edge_offset_class2.s | 269 VLD1.8 D17,[r8] @I pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
334 VLD1.8 D17,[r8] @II pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
422 …VMOVL.U8 Q9,D17 @III pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vmovl_…
448 VLD1.8 D17,[r8] @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
581 VLD1.8 D17,[r8] @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
711 VLD1.8 D17,[r8] @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
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| D | ihevc_sao_edge_offset_class3.s | 280 VLD1.8 D17,[r8] @I pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
350 VLD1.8 D17,[r8] @II pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
448 …VMOVL.U8 Q11,D17 @III pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vmovl_…
475 VLD1.8 D17,[r8] @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
609 VLD1.8 D17,[r8] @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
747 VLD1.8 D17,[r8] @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
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| D | ihevc_sao_edge_offset_class3_chroma.s | 355 VLD1.8 D17,[r11] @I pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
440 VLD1.8 D17,[r11] @II pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
557 …VMOVL.U8 Q9,D17 @III pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vmovl_…
594 VLD1.8 D17,[r11] @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
748 VLD1.8 D17,[r9] @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
913 VLD1.8 D17,[r9] @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
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| D | ihevc_sao_edge_offset_class2_chroma.s | 359 VLD1.8 D17,[r8] @I pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
444 VLD1.8 D17,[r8] @II pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
571 …VMOVL.U8 Q9,D17 @III pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vmovl_…
592 VLD1.8 D17,[r8] @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
741 VLD1.8 D17,[r8] @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
885 VLD1.8 D17,[r8] @pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
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| D | ihevc_sao_edge_offset_class0.s | 224 VTBL.8 D17,{D11},D15 @offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx))
228 …VADDW.S8 Q7,Q7,D17 @pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[1],…
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| /external/llvm/test/MC/MachO/ |
| D | x86_64-symbols.s | 56 D17: label
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| D | x86_32-symbols.s | 56 D17: label
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| /external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/neon/ |
| D | armSP_FFT_CToC_FC32_Radix8_fs_unsafe_s.S | 97 #define dUi0 D17.F32
132 #define dVi1 D17.F32
149 #define dYi0 D17.F32
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| D | armSP_FFT_CToC_SC32_Radix8_fs_unsafe_s.S | 107 #define dUi0 D17.S32
143 #define dVi1 D17.S32
162 #define dYi0 D17.S32
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| D | armSP_FFT_CToC_SC16_Radix8_fs_unsafe_s.S | 108 #define dUi0 D17.S16
144 #define dVi1 D17.S16
165 #define dYi0 D17.S16
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| D | armSP_FFT_CToC_FC32_Radix4_fs_unsafe_s.S | 96 #define dZi0 D17.F32
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| D | armSP_FFT_CToC_SC16_Radix4_fs_unsafe_s.S | 96 #define dZi0 D17.S16
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| D | armSP_FFT_CToC_SC32_Radix4_fs_unsafe_s.S | 104 #define dZi0 D17.S32
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| D | armSP_FFT_CToC_FC32_Radix4_ls_unsafe_s.S | 89 #define dYi0 D17.F32
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| D | armSP_FFT_CToC_FC32_Radix4_unsafe_s.S | 96 #define dYi2 D17.F32
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| D | armSP_FFT_CToC_SC16_Radix4_ls_unsafe_s.S | 126 #define dYi1 D17.S16
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| D | armSP_FFT_CToC_SC16_Radix4_unsafe_s.S | 103 #define dYi2 D17.S16
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| D | armSP_FFT_CToC_SC32_Radix4_ls_unsafe_s.S | 97 #define dYi0 D17.S32
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| D | armSP_FFT_CToC_SC32_Radix4_unsafe_s.S | 105 #define dYi2 D17.S32
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcRegisterInfo.td | 149 def D17 : SparcReg< 3, "F34">;
174 def Q8 : Rq< 1, "F32", [D16, D17]>;
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| /external/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.h | 128 case AArch64::D17: return AArch64::B17; in getBRegFromDReg()
168 case AArch64::B17: return AArch64::D17; in getDRegFromBReg()
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