/external/libpng/projects/visualc71/ |
D | libpng.sln | 4 {2D4F8105-7D21-454C-9932-B47CAB71A5C0} = {2D4F8105-7D21-454C-9932-B47CAB71A5C0} 12 Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "zlib", "zlib.vcproj", "{2D4F8105-7D21-454C-993… 45 {2D4F8105-7D21-454C-9932-B47CAB71A5C0}.DLL Debug.ActiveCfg = DLL Debug|Win32 46 {2D4F8105-7D21-454C-9932-B47CAB71A5C0}.DLL Debug.Build.0 = DLL Debug|Win32 47 {2D4F8105-7D21-454C-9932-B47CAB71A5C0}.DLL Release.ActiveCfg = DLL Release|Win32 48 {2D4F8105-7D21-454C-9932-B47CAB71A5C0}.DLL Release.Build.0 = DLL Release|Win32 49 {2D4F8105-7D21-454C-9932-B47CAB71A5C0}.DLL VB.ActiveCfg = DLL Release|Win32 50 {2D4F8105-7D21-454C-9932-B47CAB71A5C0}.DLL VB.Build.0 = DLL Release|Win32 51 {2D4F8105-7D21-454C-9932-B47CAB71A5C0}.LIB Debug.ActiveCfg = LIB Debug|Win32 52 {2D4F8105-7D21-454C-9932-B47CAB71A5C0}.LIB Debug.Build.0 = LIB Debug|Win32 [all …]
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/external/libhevc/decoder/arm/ |
D | ihevcd_fmt_conv_420sp_to_rgba8888.s | 237 VQMOVUN.S16 D21,Q12 241 VZIP.8 D20,D21 251 VST1.32 D21,[R2]! 288 VQMOVUN.S16 D21,Q12 292 VZIP.8 D20,D21 302 VST1.32 D21,[R8]! 368 VQMOVUN.S16 D21,Q12 372 VZIP.8 D20,D21 382 VST1.32 D21,[R2]! 410 VQMOVUN.S16 D21,Q12 [all …]
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/external/libhevc/common/arm/ |
D | ihevc_sao_band_offset_chroma.s | 295 VLD2.8 {D21,D22},[r7] @vld1q_u8(pu1_src_cpy) 308 VSUB.I8 D23,D21,D31 @vsub_u8(au1_cur_row_deint.val[0], band_pos_u) 319 …VTBX.8 D21,{D1-D4},D23 @vtbx4_u8(au1_cur_row_deint.val[0], band_table_u, vsub_u8(… 325 VST2.8 {D21,D22},[r7] @vst1q_u8(pu1_src_cpy, au1_cur_row) 355 VLD2.8 {D21,D22},[r7] @vld1q_u8(pu1_src_cpy) 365 VSUB.I8 D23,D21,D31 @vsub_u8(au1_cur_row_deint.val[0], band_pos_u) 376 …VTBX.8 D21,{D1-D4},D23 @vtbx4_u8(au1_cur_row_deint.val[0], band_table_u, vsub_u8(… 381 VZIP.8 D21,D22 384 VST1.8 {D21},[r7] @vst1q_u8(pu1_src_cpy, au1_cur_row)
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D | ihevc_sao_edge_offset_class3_chroma.s | 435 VMOVN.I16 D21,Q9 @I vmovn_s16(pi2_tmp_cur_row.val[1]) 463 VLD1.8 D21,[r2] @edge_idx_tbl = vld1_s8(gi1_table_edge_idx) 510 VTBL.8 D26,{D21},D26 @II vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx)) 515 VTBL.8 D27,{D21},D27 @II vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx)) 589 VMOVN.I16 D21,Q9 @III vmovn_s16(pi2_tmp_cur_row.val[1]) 664 VMOVN.I16 D21,Q9 @III vmovn_s16(pi2_tmp_cur_row.val[1])
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D | ihevc_sao_edge_offset_class2.s | 326 VMOVN.I16 D21,Q11 @I vmovn_s16(pi2_tmp_cur_row.val[1]) 438 VMOVN.I16 D21,Q9 @III vmovn_s16(pi2_tmp_cur_row.val[1]) 496 VMOVN.I16 D21,Q6 @vmovn_s16(pi2_tmp_cur_row.val[1])
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D | ihevc_sao_edge_offset_class3.s | 345 VMOVN.I16 D21,Q11 @I vmovn_s16(pi2_tmp_cur_row.val[1]) 470 VMOVN.I16 D21,Q11 @III vmovn_s16(pi2_tmp_cur_row.val[1]) 533 VMOVN.I16 D21,Q11 @vmovn_s16(pi2_tmp_cur_row.val[1])
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/external/llvm/test/MC/MachO/ |
D | x86_64-symbols.s | 68 D21: label
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D | x86_32-symbols.s | 68 D21: label
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/external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/neon/ |
D | armSP_FFT_CToC_FC32_Radix8_fs_unsafe_s.S | 101 #define dUi4 D21.F32 136 #define dVi5 D21.F32 153 #define dYi4 D21.F32
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D | armSP_FFT_CToC_SC32_Radix8_fs_unsafe_s.S | 111 #define dUi4 D21.S32 147 #define dVi5 D21.S32 166 #define dYi4 D21.S32
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D | armSP_FFT_CToC_SC16_Radix8_fs_unsafe_s.S | 112 #define dUi4 D21.S16 148 #define dVi5 D21.S16 169 #define dYi4 D21.S16
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D | armSP_FFT_CToC_FC32_Radix4_fs_unsafe_s.S | 100 #define dZi2 D21.F32
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D | armSP_FFT_CToC_SC16_Radix4_fs_unsafe_s.S | 100 #define dZi2 D21.S16
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D | armSP_FFT_CToC_SC32_Radix4_fs_unsafe_s.S | 108 #define dZi2 D21.S32
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D | armSP_FFT_CToC_FC32_Radix4_ls_unsafe_s.S | 93 #define dYi2 D21.F32
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D | armSP_FFT_CToC_FC32_Radix4_unsafe_s.S | 104 #define dZi0 D21.F32
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D | armSP_FFT_CToC_SC16_Radix4_ls_unsafe_s.S | 128 #define dYi2 D21.S16
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D | armSP_FFT_CToC_SC16_Radix4_unsafe_s.S | 112 #define dZi0 D21.S16
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D | armSP_FFT_CToC_SC32_Radix4_ls_unsafe_s.S | 101 #define dYi2 D21.S32
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D | armSP_FFT_CToC_SC32_Radix4_unsafe_s.S | 114 #define dZi0 D21.S32
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/external/llvm/lib/Target/Sparc/ |
D | SparcRegisterInfo.td | 153 def D21 : SparcReg<11, "F42">; 176 def Q10 : Rq< 9, "F40", [D20, D21]>;
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/external/llvm/lib/Target/AArch64/Utils/ |
D | AArch64BaseInfo.h | 132 case AArch64::D21: return AArch64::B21; in getBRegFromDReg() 172 case AArch64::B21: return AArch64::D21; in getDRegFromBReg()
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/external/llvm/lib/Target/ARM/ |
D | ARMRegisterInfo.td | 124 def D21 : ARMFReg<21, "d21">, DwarfRegNum<[277]>; 150 def Q10 : ARMReg<10, "q10", [D20, D21]>;
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/external/llvm/lib/Target/Sparc/Disassembler/ |
D | SparcDisassembler.cpp | 96 SP::D4, SP::D20, SP::D5, SP::D21,
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/external/llvm/lib/Target/AArch64/ |
D | AArch64RegisterInfo.td | 337 def D21 : AArch64Reg<21, "d21", [S21], ["v21", ""]>, DwarfRegAlias<B21>; 372 def Q21 : AArch64Reg<21, "q21", [D21], ["v21", ""]>, DwarfRegAlias<B21>;
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