/external/llvm/lib/Transforms/Scalar/ |
D | ScalarReplAggregates.cpp | 418 unsigned EltSize = In->getPrimitiveSizeInBits()/8; in MergeInTypeForLoadOrStore() local 419 if (EltSize == AllocaSize) in MergeInTypeForLoadOrStore() 425 if (Offset % EltSize == 0 && AllocaSize % EltSize == 0 && in MergeInTypeForLoadOrStore() 426 (!VectorTy || EltSize == VectorTy->getElementType() in MergeInTypeForLoadOrStore() 430 VectorTy = VectorType::get(In, AllocaSize/EltSize); in MergeInTypeForLoadOrStore() 783 unsigned EltSize = DL.getTypeAllocSizeInBits(VTy->getElementType()); in ConvertScalar_ExtractValue() local 784 Elt = Offset/EltSize; in ConvertScalar_ExtractValue() 785 assert(EltSize*Elt == Offset && "Invalid modulus in validity checking"); in ConvertScalar_ExtractValue() 823 uint64_t EltSize = DL.getTypeAllocSizeInBits(AT->getElementType()); in ConvertScalar_ExtractValue() local 827 Offset+i*EltSize, nullptr, in ConvertScalar_ExtractValue() [all …]
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/external/llvm/lib/Analysis/ |
D | ConstantFolding.cpp | 324 uint64_t EltSize = TD.getTypeAllocSize(CS->getOperand(Index)->getType()); in ReadDataFromGlobal() local 326 if (ByteOffset < EltSize && in ReadDataFromGlobal() 355 uint64_t EltSize = TD.getTypeAllocSize(EltTy); in ReadDataFromGlobal() local 356 uint64_t Index = ByteOffset / EltSize; in ReadDataFromGlobal() 357 uint64_t Offset = ByteOffset - Index * EltSize; in ReadDataFromGlobal() 369 uint64_t BytesWritten = EltSize - Offset; in ReadDataFromGlobal() 370 assert(BytesWritten <= EltSize && "Not indexing into this element?"); in ReadDataFromGlobal()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.h | 325 bool isSplatShuffleMask(ShuffleVectorSDNode *N, unsigned EltSize); 333 unsigned getVSPLTImmediate(SDNode *N, unsigned EltSize, SelectionDAG &DAG);
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D | PPCISelLowering.cpp | 1009 bool PPC::isSplatShuffleMask(ShuffleVectorSDNode *N, unsigned EltSize) { in isSplatShuffleMask() argument 1011 (EltSize == 1 || EltSize == 2 || EltSize == 4)); in isSplatShuffleMask() 1023 for (unsigned i = 1; i != EltSize; ++i) in isSplatShuffleMask() 1027 for (unsigned i = EltSize, e = 16; i != e; i += EltSize) { in isSplatShuffleMask() 1029 for (unsigned j = 0; j != EltSize; ++j) in isSplatShuffleMask() 1054 unsigned PPC::getVSPLTImmediate(SDNode *N, unsigned EltSize, in getVSPLTImmediate() argument 1057 assert(isSplatShuffleMask(SVOp, EltSize)); in getVSPLTImmediate() 1059 return (16 / EltSize) - 1 - (SVOp->getMaskElt(0) / EltSize); in getVSPLTImmediate() 1061 return SVOp->getMaskElt(0) / EltSize; in getVSPLTImmediate() 1075 unsigned EltSize = 16/N->getNumOperands(); in get_VSPLTI_elt() local [all …]
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D | PPCISelDAGToDAG.cpp | 1494 int EltSize = N->getConstantOperandVal(1); in Select() local 1498 if (EltSize == 1) { in Select() 1503 } else if (EltSize == 2) { in Select() 1509 assert(EltSize == 4 && "Invalid element size on VADD_SPLAT!"); in Select()
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/external/llvm/lib/CodeGen/ |
D | Analysis.cpp | 93 uint64_t EltSize = TLI.getDataLayout()->getTypeAllocSize(EltTy); in ComputeValueVTs() local 96 StartingOffset + i * EltSize); in ComputeValueVTs()
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/external/clang/lib/CodeGen/ |
D | TargetInfo.cpp | 1693 uint64_t EltSize = getContext().getTypeSize(AT->getElementType()); in classify() local 1699 if (Size > 128 && EltSize != 256) in classify() 1702 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) { in classify() 1963 unsigned EltSize = (unsigned)Context.getTypeSize(AT->getElementType()); in BitsContainNoUserData() local 1969 unsigned EltOffset = i*EltSize; in BitsContainNoUserData() 2051 unsigned EltSize = TD.getTypeAllocSize(EltTy); in ContainsFloatAtOffset() local 2052 IROffset -= IROffset/EltSize*EltSize; in ContainsFloatAtOffset() 2140 unsigned EltSize = getDataLayout().getTypeAllocSize(EltTy); in GetINTEGERTypeAtOffset() local 2141 unsigned EltOffset = IROffset/EltSize*EltSize; in GetINTEGERTypeAtOffset()
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D | CGBuiltin.cpp | 1771 int EltSize = VTy->getScalarSizeInBits(); in EmitNeonRShiftImm() local 1777 if (ShiftAmt == EltSize) { in EmitNeonRShiftImm()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeTypes.cpp | 982 unsigned EltSize = EltVT.getSizeInBits() / 8; // FIXME: should be ABI size. in GetVectorElementPointer() local 985 DAG.getConstant(EltSize, Index.getValueType())); in GetVectorElementPointer()
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D | LegalizeDAG.cpp | 609 unsigned EltSize = EltVT.getSizeInBits()/8; in PerformInsertVectorEltInMemory() local 610 Tmp3 = DAG.getNode(ISD::MUL, dl, IdxVT, Tmp3,DAG.getConstant(EltSize, IdxVT)); in PerformInsertVectorEltInMemory() 1437 unsigned EltSize = in ExpandExtractFromVectorThroughStack() local 1440 DAG.getConstant(EltSize, Idx.getValueType())); in ExpandExtractFromVectorThroughStack() 1475 unsigned EltSize = in ExpandInsertToVectorThroughStack() local 1479 DAG.getConstant(EltSize, Idx.getValueType())); in ExpandInsertToVectorThroughStack()
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D | SelectionDAG.cpp | 121 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits(); in isBuildVectorAllOnes() local 123 if (CN->getAPIntValue().countTrailingOnes() < EltSize) in isBuildVectorAllOnes() 126 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize) in isBuildVectorAllOnes() 165 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits(); in isBuildVectorAllZeros() local 167 if (CN->getAPIntValue().countTrailingZeros() < EltSize) in isBuildVectorAllZeros() 170 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingZeros() < EltSize) in isBuildVectorAllZeros()
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D | DAGCombiner.cpp | 11183 unsigned EltSize = (unsigned)TD.getTypeAllocSize(Elts[0]->getType()); in SimplifySelectCC() local 11184 SDValue One = DAG.getIntPtrConstant(EltSize); in SimplifySelectCC()
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/external/llvm/lib/Transforms/InstCombine/ |
D | InstructionCombining.cpp | 914 uint64_t EltSize = DL->getTypeAllocSize(AT->getElementType()); in FindElementAtOffset() local 915 assert(EltSize && "Cannot index into a zero-sized array"); in FindElementAtOffset() 916 NewIndices.push_back(ConstantInt::get(IntPtrTy,Offset/EltSize)); in FindElementAtOffset() 917 Offset %= EltSize; in FindElementAtOffset()
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/external/clang/lib/AST/ |
D | ExprConstant.cpp | 1572 unsigned EltSize = Info.Ctx.getTypeSize(EltTy); in EvalAndBitcastToAPInt() local 1590 Res |= EltAsInt.zextOrTrunc(VecSize).rotr(i*EltSize+BaseEltSize); in EvalAndBitcastToAPInt() 1592 Res |= EltAsInt.zextOrTrunc(VecSize).rotl(i*EltSize); in EvalAndBitcastToAPInt() 5354 unsigned EltSize = Info.Ctx.getTypeSize(EltTy); in VisitCastExpr() local 5359 unsigned FloatEltSize = EltSize; in VisitCastExpr() 5365 Elt = SValInt.rotl(i*EltSize+FloatEltSize).trunc(FloatEltSize); in VisitCastExpr() 5367 Elt = SValInt.rotr(i*EltSize).trunc(FloatEltSize); in VisitCastExpr() 5374 Elt = SValInt.rotl(i*EltSize+EltSize).zextOrTrunc(EltSize); in VisitCastExpr() 5376 Elt = SValInt.rotr(i*EltSize).zextOrTrunc(EltSize); in VisitCastExpr()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 4989 unsigned EltSize = VT.getVectorElementType().getSizeInBits(); in LowerBUILD_VECTOR() local 4993 if (hasDominantValue && EltSize <= 32) { in LowerBUILD_VECTOR() 5073 if (EltSize >= 32) { in LowerBUILD_VECTOR() 5076 EVT EltVT = EVT::getFloatingPointVT(EltSize); in LowerBUILD_VECTOR() 5278 unsigned EltSize = VT.getVectorElementType().getSizeInBits(); in isShuffleMaskLegal() local 5279 return (EltSize >= 32 || in isShuffleMaskLegal() 5426 unsigned EltSize = VT.getVectorElementType().getSizeInBits(); in LowerVECTOR_SHUFFLE() local 5427 if (EltSize <= 32) { in LowerVECTOR_SHUFFLE() 5527 if (EltSize >= 32) { in LowerVECTOR_SHUFFLE() 5530 EVT EltVT = EVT::getFloatingPointVT(EltSize); in LowerVECTOR_SHUFFLE() [all …]
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/external/llvm/lib/Target/Mips/ |
D | MipsSEISelLowering.cpp | 851 unsigned EltSize = Ty.getVectorElementType().getSizeInBits(); in performDSPShiftCombine() local 859 EltSize, !Subtarget->isLittle()) || in performDSPShiftCombine() 860 (SplatBitSize != EltSize) || in performDSPShiftCombine() 861 (SplatValue.getZExtValue() >= EltSize)) in performDSPShiftCombine()
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/external/llvm/lib/IR/ |
D | Constants.cpp | 2610 unsigned EltSize = getElementByteSize(); in getSplatValue() local 2612 if (memcmp(Base, Base+i*EltSize, EltSize)) in getSplatValue()
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/external/llvm/lib/Transforms/IPO/ |
D | GlobalOpt.cpp | 522 uint64_t EltSize = DL.getTypeAllocSize(STy->getElementType()); in SRAGlobal() local 539 unsigned NewAlign = (unsigned)MinAlign(StartAlignment, EltSize*i); in SRAGlobal()
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/external/llvm/lib/Transforms/Instrumentation/ |
D | MemorySanitizer.cpp | 762 uint32_t EltSize = MS.DL->getTypeSizeInBits(VT->getElementType()); in getShadowTy() local 763 return VectorType::get(IntegerType::get(*MS.C, EltSize), in getShadowTy()
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 1457 unsigned EltSize = VT.getVectorElementType().getSizeInBits(); in resetOperationActions() local 1470 if ( EltSize >= 32) { in resetOperationActions() 3859 unsigned EltSize = VT.getVectorElementType().getSizeInBits(); in isSHUFPMask() local 3861 (VT.getSizeInBits() >= 256) && (EltSize == 32); in isSHUFPMask() 4342 unsigned EltSize = VT.getVectorElementType().getSizeInBits(); in isPermImmMask() local 4343 if (EltSize < 32) in isPermImmMask() 4348 if (VT.is128BitVector() || (VT.is256BitVector() && EltSize == 64)) { in isPermImmMask() 4386 unsigned EltSize = VT.getVectorElementType().getSizeInBits(); in isVPERMILPMask() local 4387 if (VT.getSizeInBits() < 256 || EltSize < 32) in isVPERMILPMask() 4389 bool symetricMaskRequired = (EltSize == 32); in isVPERMILPMask() [all …]
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/external/llvm/lib/Target/R600/ |
D | AMDGPUISelLowering.cpp | 646 unsigned EltSize = TD->getTypeAllocSize(SeqTy->getElementType()); in LowerConstantInitializer() local 649 SDValue Offset = DAG.getConstant(i * EltSize, PtrVT); in LowerConstantInitializer()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 5786 unsigned EltSize = VT.getVectorElementType().getSizeInBits(); in LowerVectorSRA_SRL_SHL() local 5793 if (isVShiftLImm(Op.getOperand(1), VT, false, Cnt) && Cnt < EltSize) in LowerVectorSRA_SRL_SHL() 5803 Cnt < EltSize) { in LowerVectorSRA_SRL_SHL()
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