| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDGPUInstrInfo.td | 36 def AMDGPUfmax : SDNode<"AMDGPUISD::FMAX", SDTFPBinOp,
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| D | AMDGPUISelLowering.h | 117 FMAX, enumerator
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| D | AMDGPUISelLowering.cpp | 124 return DAG.getNode(AMDGPUISD::FMAX, DL, VT, Op.getOperand(1), in LowerINTRINSIC_WO_CHAIN()
345 NODE_NAME_CASE(FMAX) in getTargetNodeName()
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| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| D | AMDGPUInstrInfo.td | 36 def AMDGPUfmax : SDNode<"AMDGPUISD::FMAX", SDTFPBinOp,
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| D | AMDGPUISelLowering.h | 117 FMAX, enumerator
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| D | AMDGPUISelLowering.cpp | 124 return DAG.getNode(AMDGPUISD::FMAX, DL, VT, Op.getOperand(1), in LowerINTRINSIC_WO_CHAIN()
345 NODE_NAME_CASE(FMAX) in getTargetNodeName()
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| /external/vixl/src/a64/ |
| D | constants-a64.h | 990 FMAX = FPDataProcessing2SourceFixed | 0x00004000, enumerator
991 FMAX_s = FMAX,
992 FMAX_d = FMAX | FP64,
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| D | disasm-a64.cc | 1030 FORMAT(FMAX, "fmax"); in VisitFPDataProcessing2Source()
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| D | assembler-a64.cc | 1314 FPDataProcessing2Source(fd, fn, fm, FMAX); in fmax()
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| /external/llvm/lib/Target/R600/ |
| D | AMDGPUISelLowering.h | 182 FMAX, enumerator
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| D | AMDGPUInstrInfo.td | 53 def AMDGPUfmax : SDNode<"AMDGPUISD::FMAX", SDTFPBinOp,
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| D | AMDGPUISelLowering.cpp | 985 unsigned Opc = (LHS == True) ? AMDGPUISD::FMIN : AMDGPUISD::FMAX; in CombineMinMax()
994 unsigned Opc = (LHS == True) ? AMDGPUISD::FMAX : AMDGPUISD::FMIN; in CombineMinMax()
2120 NODE_NAME_CASE(FMAX) in getTargetNodeName()
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| /external/chromium_org/v8/src/arm64/ |
| D | constants-arm64.h | 1108 FMAX = FPDataProcessing2SourceFixed | 0x00004000, enumerator
1109 FMAX_s = FMAX,
1110 FMAX_d = FMAX | FP64,
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| D | disasm-arm64.cc | 1023 FORMAT(FMAX, "fmax"); in VisitFPDataProcessing2Source()
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| D | assembler-arm64.cc | 1872 FPDataProcessing2Source(fd, fn, fm, FMAX); in fmax()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 64 FMAX, enumerator
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| D | AArch64ISelLowering.cpp | 671 case AArch64ISD::FMAX: return "AArch64ISD::FMAX"; in getTargetNodeName()
3355 return DAG.getNode(AArch64ISD::FMAX, dl, VT, MinMaxLHS, MinMaxRHS); in LowerSELECT_CC()
7108 return DAG.getNode(AArch64ISD::FMAX, SDLoc(N), N->getValueType(0), in performIntrinsicCombine()
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| D | AArch64InstrInfo.td | 151 def AArch64fmax : SDNode<"AArch64ISD::FMAX", SDTFPBinOp>;
2359 defm FMAX : TwoOperandFPData<0b0100, "fmax", AArch64fmax>;
2630 defm FMAX : SIMDThreeSameVectorFP<0,0,0b11110,"fmax", AArch64fmax>;
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 181 FMAX, enumerator
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| D | ARMISelLowering.cpp | 1040 case ARMISD::FMAX: return "ARMISD::FMAX"; in getTargetNodeName()
9527 Opcode = IsReversed ? ARMISD::FMAX : ARMISD::FMIN; in PerformSELECT_CCCombine()
9549 Opcode = IsReversed ? ARMISD::FMIN : ARMISD::FMAX; in PerformSELECT_CCCombine()
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| D | ARMInstrNEON.td | 584 def NEONfmax : SDNode<"ARMISD::FMAX", SDTARMFMAX>;
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrFragmentsSIMD.td | 37 def X86fmax : SDNode<"X86ISD::FMAX", SDTFPBinOp>;
39 // Commutative and Associative FMIN and FMAX.
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| D | X86ISelLowering.h | 219 FMAX, FMIN, enumerator
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| D | X86ISelLowering.cpp | 13743 Opcode = X86ISD::FMAX; in LowerINTRINSIC_WO_CHAIN()
16535 case X86ISD::FMAX: return "X86ISD::FMAX"; in getTargetNodeName()
19274 Opcode = X86ISD::FMAX; in PerformSELECTCombine()
19286 Opcode = X86ISD::FMAX; in PerformSELECTCombine()
19295 Opcode = X86ISD::FMAX; in PerformSELECTCombine()
19336 Opcode = X86ISD::FMAX; in PerformSELECTCombine()
19348 Opcode = X86ISD::FMAX; in PerformSELECTCombine()
19357 Opcode = X86ISD::FMAX; in PerformSELECTCombine()
21423 assert(N->getOpcode() == X86ISD::FMIN || N->getOpcode() == X86ISD::FMAX); in PerformFMinFMaxCombine()
21435 case X86ISD::FMAX: NewOp = X86ISD::FMAXC; break; in PerformFMinFMaxCombine()
[all …]
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