| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrFP.td | 16 def SelectF64 : SelectWrapper<FP64>;
21 defm CondStoreF64 : CondStores<FP64, nonvolatile_store,
31 def LZDR : InherentRRE<"lzdr", 0xB375, FP64, (fpimm0)>;
38 def LDR : UnaryRR <"ld", 0x28, null_frag, FP64, FP64>;
46 defm LTDBR : LoadAndTestRRE<"ltdb", 0xB312, FP64>;
50 defm : CompareZeroFP<LTDBRCompare, FP64>;
54 def LGDR : UnaryRRE<"lgd", 0xB3CD, bitconvert, GR64, FP64>;
55 def LDGR : UnaryRRE<"ldg", 0xB3C1, bitconvert, FP64, GR64>;
60 def CPSDRsd : BinaryRRF<"cpsd", 0xB372, fcopysign, FP32, FP64>;
67 // fcopysign with an FP64 result.
[all …]
|
| D | SystemZRegisterInfo.td | 179 defm FP64 : SystemZRegClass<"FP64", f64, 64, (sequence "F%uD", 0, 15)>;
|
| /external/vixl/src/a64/ |
| D | constants-a64.h | 306 FP64 = 0x00400000 enumerator
888 FCMP_d = FPCompareFixed | FP64 | 0x00000000,
891 FCMP_d_zero = FPCompareFixed | FP64 | 0x00000008,
894 FCMPE_d = FPCompareFixed | FP64 | 0x00000010,
896 FCMPE_d_zero = FPCompareFixed | FP64 | 0x00000018
905 FCCMP_d = FPConditionalCompareFixed | FP64 | 0x00000000,
908 FCCMPE_d = FPConditionalCompareFixed | FP64 | 0x00000010,
918 FCSEL_d = FPConditionalSelectFixed | FP64 | 0x00000000,
928 FMOV_d_imm = FPImmediateFixed | FP64 | 0x00000000
937 FMOV_d = FPDataProcessing1SourceFixed | FP64 | 0x00000000,
[all …]
|
| D | simulator-a64.cc | 1526 unsigned reg_size = (instr->Mask(FP64) == FP64) ? kDRegSize : kSRegSize; in VisitFPCompare()
1548 unsigned reg_size = (instr->Mask(FP64) == FP64) ? kDRegSize : kSRegSize; in VisitFPConditionalCompare()
2314 if (instr->Mask(FP64) == FP64) { in FPProcessNaNs()
|
| D | assembler-a64.h | 1654 return fd.Is64Bits() ? FP64 : FP32; in FPType()
|
| /external/chromium_org/v8/src/arm64/ |
| D | constants-arm64.h | 416 FP64 = 0x00400000 enumerator
1006 FCMP_d = FPCompareFixed | FP64 | 0x00000000,
1009 FCMP_d_zero = FPCompareFixed | FP64 | 0x00000008,
1012 FCMPE_d = FPCompareFixed | FP64 | 0x00000010,
1014 FCMPE_d_zero = FPCompareFixed | FP64 | 0x00000018
1023 FCCMP_d = FPConditionalCompareFixed | FP64 | 0x00000000,
1026 FCCMPE_d = FPConditionalCompareFixed | FP64 | 0x00000010,
1036 FCSEL_d = FPConditionalSelectFixed | FP64 | 0x00000000,
1046 FMOV_d_imm = FPImmediateFixed | FP64 | 0x00000000
1055 FMOV_d = FPDataProcessing1SourceFixed | FP64 | 0x00000000,
[all …]
|
| D | simulator-arm64.cc | 2389 unsigned reg_size = (instr->Mask(FP64) == FP64) ? kDRegSizeInBits in VisitFPCompare()
2412 unsigned reg_size = (instr->Mask(FP64) == FP64) ? kDRegSizeInBits in VisitFPConditionalCompare()
3167 if (instr->Mask(FP64) == FP64) { in FPProcessNaNs()
|
| D | assembler-arm64-inl.h | 1225 return fd.Is64Bits() ? FP64 : FP32;
|
| /external/llvm/test/CodeGen/Mips/ |
| D | buildpairextractelementf64.ll | 3 ; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+fp64 < %s | FileCheck %s -check-prefix=FP64 -check-…
4 ; RUN: llc -march=mips -mcpu=mips32r2 -mattr=+fp64 < %s | FileCheck %s -check-prefix=FP64 -check-pr…
11 ; FP64-DAG: mtc1
12 ; FP64-DAG: mthc1
24 ; FP64-DAG: mfc1
25 ; FP64-DAG: mfhc1
|
| D | 2013-11-18-fp64-const0.ll | 2 ; RUN: llc -march=mips -mcpu=mips32r2 -mattr=+fp64 < %s | FileCheck -check-prefix=CHECK-FP64 %s
6 ; It originally failed on MIPS32 with FP64 with the following error:
16 ; CHECK-FP64: mtc1 $zero, $f{{[0-9]+}}
17 ; CHECK-FP64-NOT: mtc1 $zero,
|
| /external/llvm/test/CodeGen/Mips/cconv/ |
| D | callee-saved-fpxx1.ll | 1 ; RUN: llc -march=mips -mattr=+o32,+fp64 < %s | FileCheck --check-prefix=O32-FP64-INV %s
2 ; RUN: llc -march=mipsel -mattr=+o32,+fp64 < %s | FileCheck --check-prefix=O32-FP64-INV %s
20 ; O32-FP64-INV-NOT: sdc1 $f20,
|
| /external/llvm/lib/Target/R600/ |
| D | AMDGPUSubtarget.h | 52 bool FP64; variable
92 return FP64; in hasHWFP64()
|
| D | AMDGPUSubtarget.cpp | 37 FP64(false), in AMDGPUSubtarget()
|
| D | AMDGPU.td | 36 "FP64",
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.h | 110 MachineBasicBlock::iterator I, bool FP64) const;
112 MachineBasicBlock::iterator I, bool FP64) const;
|
| D | MipsSEInstrInfo.cpp | 514 bool FP64) const { in expandExtractElementF64()
524 if (SubIdx == Mips::sub_hi && FP64) { in expandExtractElementF64()
544 bool FP64) const { in expandBuildPairF64()
569 if (HasMTHC1 || FP64) { in expandBuildPairF64()
584 BuildMI(MBB, I, dl, get(FP64 ? Mips::MTHC1_D64 : Mips::MTHC1_D32), DstReg) in expandBuildPairF64()
|
| /external/llvm/test/MC/SystemZ/ |
| D | regs-bad.s | 116 # Test FP64 operands
|
| /external/valgrind/main/coregrind/ |
| D | m_machine.c | 1481 # define FP64 22 in VG_() macro
1550 if (FIR & (1 << FP64)) { in VG_()
|
| /external/clang/lib/Driver/ |
| D | ToolChains.cpp | 1769 Multilib FP64 = Multilib() in findMIPSMultilibs() local
1795 .Maybe(FP64) in findMIPSMultilibs()
|