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Searched refs:G8RC (Results 1 – 4 of 4) sorted by relevance

/external/llvm/lib/Target/PowerPC/
DPPCRegisterInfo.cpp303 const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; in lowerDynamicAlloc() local
305 unsigned Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerDynamicAlloc()
329 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC); in lowerDynamicAlloc()
337 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC); in lowerDynamicAlloc()
401 const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; in lowerCRSpilling() local
404 unsigned Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRSpilling()
416 Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRSpilling()
445 const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; in lowerCRRestore() local
448 unsigned Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRRestore()
460 Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRRestore()
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DPPCRegisterInfo.td232 def G8RC : RegisterClass<"PPC", [i64], 64, (add (sequence "X%u", 2, 12),
240 def G8RC_NOX0 : RegisterClass<"PPC", [i64], 64, (add (sub G8RC, X0), ZERO8)>;
DPPCFrameLowering.cpp1339 const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; in addScavengingSpillSlot() local
1340 const TargetRegisterClass *RC = Subtarget.isPPC64() ? G8RC : GPRC; in addScavengingSpillSlot()
DPPCInstrInfo.td366 def g8rc : RegisterOperand<G8RC> {