| /external/qemu/disas/ |
| D | mips.c | 1125 #define I32 INSN_ISA32 macro
1217 {"pref", "k,o(b)", 0xcc000000, 0xfc000000, RD_b, 0, I4|I32|G3 },
1220 {"ssnop", "", 0x00000040, 0xffffffff, 0, INSN2_ALIAS, I32|N55 }, /* sll */
1278 {"bc1f", "N,p", 0x45000000, 0xffe30000, CBD|RD_CC|FP_S, 0, I4|I32 },
1280 {"bc1fl", "N,p", 0x45020000, 0xffe30000, CBL|RD_CC|FP_S, 0, I4|I32 },
1282 {"bc1t", "N,p", 0x45010000, 0xffe30000, CBD|RD_CC|FP_S, 0, I4|I32 },
1284 {"bc1tl", "N,p", 0x45030000, 0xffe30000, CBL|RD_CC|FP_S, 0, I4|I32 },
1347 {"c.f.d", "M,S,T", 0x46200030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, 0, I4|I32 },
1349 {"c.f.s", "M,S,T", 0x46000030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, 0, I4|I32 },
1353 {"c.un.d", "M,S,T", 0x46200031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, 0, I4|I32 },
[all …]
|
| /external/llvm/test/Transforms/ArgumentPromotion/ |
| D | reserve-tbaa.ll | 28 ; CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa ![[I32:[0-9]+]]
29 ; CHECK: %g.val = load i32* @g, align 4, !tbaa ![[I32]]
49 ; CHECK: ![[I32]] = metadata !{metadata ![[I32_TYPE:[0-9]+]], metadata ![[I32_TYPE]], i64 0}
|
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/nouveau/ |
| D | nouveau_render_t.c | 117 EMIT_VBO(I32, ctx, start, delta, n); in dispatch_i32()
127 EMIT_VBO(I32, ctx, start, delta, n & 1); in dispatch_i16()
|
| /external/mesa3d/src/mesa/drivers/dri/nouveau/ |
| D | nouveau_render_t.c | 117 EMIT_VBO(I32, ctx, start, delta, n); in dispatch_i32()
127 EMIT_VBO(I32, ctx, start, delta, n & 1); in dispatch_i16()
|
| /external/valgrind/main/none/tests/amd64/ |
| D | rcl-amd64.c | 5 #define I32(C) "rcrl %%ebx\n" "rcll $" #C ",%%eax\n" "rcll %%ebx\n" macro
17 asm(I32(C) : "+a"(a), "+b"(b) : /* */); \
|
| /external/llvm/tools/llvm-stress/ |
| D | llvm-stress.cpp | 441 Type *I32 = Type::getInt32Ty(BB->getContext()); in Act() local
443 Constant *CI = ConstantInt::get(I32, Ran->Rand() % (Width*2)); in Act()
446 CI = UndefValue::get(I32); in Act()
|
| /external/llvm/test/CodeGen/R600/ |
| D | 32-bit-local-address-space.ll | 9 ; Instructions with B32, U32, and I32 in their name take 32-bit operands, while
|
| /external/llvm/lib/Target/X86/ |
| D | X86InstrArithmetic.td | 219 def IMUL32rri : Ii32<0x69, MRMSrcReg, // GR32 = GR32*I32
231 def IMUL64rri32 : RIi32S<0x69, MRMSrcReg, // GR64 = GR64*I32
261 def IMUL32rmi : Ii32<0x69, MRMSrcMem, // GR32 = [mem32]*I32
274 def IMUL64rmi32 : RIi32S<0x69, MRMSrcMem, // GR64 = [mem64]*I32
|
| D | X86ISelDAGToDAG.cpp | 1609 I32, enumerator
1829 Opc = AtomicOpcTbl[Op][I32]; in SelectAtomicLoadArith()
|
| /external/valgrind/main/VEX/orig_x86/ |
| D | manyfp.orig | 6098 vex iropt: fold_Expr: no rule for: 32to1(0x1:I32)
6242 vex iropt: fold_Expr: no rule for: 32to1(0x1:I32)
|