/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 140 INTRINSIC_W_CHAIN, enumerator
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D | SelectionDAGNodes.h | 1282 return N->getOpcode() == ISD::INTRINSIC_W_CHAIN ||
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/external/llvm/lib/Target/NVPTX/ |
D | NVPTXISelLowering.cpp | 197 setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::Other, Custom); in NVPTXTargetLowering() 232 setOperationAction(ISD::INTRINSIC_W_CHAIN, VT, Custom); in NVPTXTargetLowering() 237 setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::i8, Custom); in NVPTXTargetLowering() 1406 case ISD::INTRINSIC_W_CHAIN: in LowerOperation() 2331 Info.opc = ISD::INTRINSIC_W_CHAIN; in getTgtMemIntrinsic() 2343 Info.opc = ISD::INTRINSIC_W_CHAIN; in getTgtMemIntrinsic() 2357 Info.opc = ISD::INTRINSIC_W_CHAIN; in getTgtMemIntrinsic() 2386 Info.opc = ISD::INTRINSIC_W_CHAIN; in getTgtMemIntrinsic() 3269 DAG.getMemIntrinsicNode(ISD::INTRINSIC_W_CHAIN, DL, LdResVTs, Ops, in ReplaceINTRINSIC_W_CHAIN() 3288 case ISD::INTRINSIC_W_CHAIN: in ReplaceNodeResults()
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D | NVPTXISelDAGToDAG.cpp | 170 case ISD::INTRINSIC_W_CHAIN: in Select() 1020 if (N->getOpcode() == ISD::INTRINSIC_W_CHAIN) { in SelectLDGLDU() 1057 case ISD::INTRINSIC_W_CHAIN: in SelectLDGLDU() 1201 case ISD::INTRINSIC_W_CHAIN: in SelectLDGLDU() 1339 case ISD::INTRINSIC_W_CHAIN: in SelectLDGLDU() 1483 case ISD::INTRINSIC_W_CHAIN: in SelectLDGLDU() 1621 case ISD::INTRINSIC_W_CHAIN: in SelectLDGLDU()
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/external/llvm/lib/Target/XCore/ |
D | XCoreISelDAGToDAG.cpp | 238 if (Addr->getOpcode() != ISD::INTRINSIC_W_CHAIN) in SelectBRIND()
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D | XCoreISelLowering.cpp | 181 setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN); in XCoreTargetLowering() 1857 case ISD::INTRINSIC_W_CHAIN: in computeKnownBitsForTargetNode()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 109 case ISD::INTRINSIC_W_CHAIN: { in getOperationName()
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D | TargetLowering.cpp | 1094 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || in computeKnownBitsForTargetNode() 1109 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || in ComputeNumSignBitsForTargetNode()
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D | SelectionDAG.cpp | 2344 case ISD::INTRINSIC_W_CHAIN: in computeKnownBits() 2552 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || in ComputeNumSignBits() 4567 Opcode == ISD::INTRINSIC_W_CHAIN || in getMemIntrinsicNode()
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D | SelectionDAGISel.cpp | 3252 if (N->getOpcode() != ISD::INTRINSIC_W_CHAIN && in CannotYetSelect()
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D | LegalizeDAG.cpp | 1177 case ISD::INTRINSIC_W_CHAIN: in LegalizeOp() 4125 case ISD::INTRINSIC_W_CHAIN: in ExpandNode()
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D | SelectionDAGBuilder.cpp | 3807 Info.opc == ISD::INTRINSIC_W_CHAIN) in visitTargetIntrinsic() 3836 Result = DAG.getNode(ISD::INTRINSIC_W_CHAIN, getCurSDLoc(), VTs, Ops); in visitTargetIntrinsic()
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/external/llvm/lib/Target/Mips/ |
D | MipsSEISelDAGToDAG.cpp | 723 case ISD::INTRINSIC_W_CHAIN: { in selectNode()
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D | MipsSEISelLowering.cpp | 132 setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::i64, Custom); in MipsSETargetLowering() 147 setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::Other, Custom); in MipsSETargetLowering() 370 case ISD::INTRINSIC_W_CHAIN: return lowerINTRINSIC_W_CHAIN(Op, DAG); in LowerOperation()
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/external/llvm/lib/Target/R600/ |
D | SIISelLowering.cpp | 788 assert(Intr->getOpcode() == ISD::INTRINSIC_W_CHAIN); in LowerBRCOND() 804 Res.size() > 1 ? ISD::INTRINSIC_W_CHAIN : ISD::INTRINSIC_VOID, DL, in LowerBRCOND()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 550 setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN); in ARMTargetLowering() 6170 Cycles32 = DAG.getNode(ISD::INTRINSIC_W_CHAIN, DL, in ReplaceREADCYCLECOUNTER() 8830 N->getOpcode() == ISD::INTRINSIC_W_CHAIN); in CombineBaseUpdate() 8965 if (VLD->getOpcode() != ISD::INTRINSIC_W_CHAIN) in CombineVLDDUP() 9660 case ISD::INTRINSIC_W_CHAIN: in PerformDAGCombine() 10222 case ISD::INTRINSIC_W_CHAIN: { in computeKnownBitsForTargetNode() 10670 Info.opc = ISD::INTRINSIC_W_CHAIN; in getTgtMemIntrinsic() 10712 Info.opc = ISD::INTRINSIC_W_CHAIN; in getTgtMemIntrinsic() 10725 Info.opc = ISD::INTRINSIC_W_CHAIN; in getTgtMemIntrinsic() 10737 Info.opc = ISD::INTRINSIC_W_CHAIN; in getTgtMemIntrinsic() [all …]
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D | ARMISelDAGToDAG.cpp | 2988 case ISD::INTRINSIC_W_CHAIN: { in Select()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 366 setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN); in AArch64TargetLowering() 582 case ISD::INTRINSIC_W_CHAIN: { in computeKnownBitsForTargetNode() 5982 Info.opc = ISD::INTRINSIC_W_CHAIN; in getTgtMemIntrinsic() 6024 Info.opc = ISD::INTRINSIC_W_CHAIN; in getTgtMemIntrinsic() 6037 Info.opc = ISD::INTRINSIC_W_CHAIN; in getTgtMemIntrinsic() 6049 Info.opc = ISD::INTRINSIC_W_CHAIN; in getTgtMemIntrinsic() 6061 Info.opc = ISD::INTRINSIC_W_CHAIN; in getTgtMemIntrinsic() 7745 case ISD::INTRINSIC_W_CHAIN: in PerformDAGCombine()
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D | AArch64ISelDAGToDAG.cpp | 2155 case ISD::INTRINSIC_W_CHAIN: { in Select()
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/external/llvm/lib/Target/X86/ |
D | X86ISelDAGToDAG.cpp | 1318 Parent->getOpcode() != ISD::INTRINSIC_W_CHAIN && // unaligned loads, fixme in SelectAddr() 2074 case ISD::INTRINSIC_W_CHAIN: { in Select()
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D | X86ISelLowering.cpp | 1502 setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::Other, Custom); in resetOperationActions() 1505 setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::i64, Custom); in resetOperationActions() 16216 case ISD::INTRINSIC_W_CHAIN: return LowerINTRINSIC_W_CHAIN(Op, Subtarget, DAG); in LowerOperation() 16351 case ISD::INTRINSIC_W_CHAIN: { in ReplaceNodeResults() 18211 Opc == ISD::INTRINSIC_W_CHAIN || in computeKnownBitsForTargetNode()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 336 setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::i1, Custom); in PPCTargetLowering() 6175 case ISD::INTRINSIC_W_CHAIN: return SDValue(); in LowerOperation() 6191 case ISD::INTRINSIC_W_CHAIN: { in ReplaceNodeResults() 8374 if (Cond.getOpcode() == ISD::INTRINSIC_W_CHAIN && in PerformDAGCombine() 8400 LHS.getOperand(0).getOpcode() == ISD::INTRINSIC_W_CHAIN && in PerformDAGCombine() 8408 if (LHS.getOpcode() == ISD::INTRINSIC_W_CHAIN && in PerformDAGCombine()
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/external/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 485 def intrinsic_w_chain : SDNode<"ISD::INTRINSIC_W_CHAIN",
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