Searched refs:ISA_MIPS32 (Results 1 – 6 of 6) sorted by relevance
| /external/qemu/target-mips/ |
| D | mips-defs.h | 28 #define ISA_MIPS32 0x00000020 macro
60 #define CPU_MIPS32 (CPU_MIPS2 | ISA_MIPS32)
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| D | translate.c | 2910 check_insn(env, ctx, ISA_MIPS32); in gen_mfc0()
3487 check_insn(env, ctx, ISA_MIPS32); in gen_mtc0()
5652 check_insn(env, ctx, ISA_MIPS32); in gen_cp0()
5663 check_insn(env, ctx, ISA_MIPS3 | ISA_MIPS32); in gen_cp0()
5690 check_insn(env, ctx, ISA_MIPS4 | ISA_MIPS32); in gen_compute_branch1()
7680 check_insn(env, ctx, ISA_MIPS4 | ISA_MIPS32); in decode_opc()
7754 check_insn(env, ctx, ISA_MIPS4 | ISA_MIPS32); in decode_opc()
7805 check_insn(env, ctx, ISA_MIPS32); in decode_opc()
7813 check_insn(env, ctx, ISA_MIPS32); in decode_opc()
7820 check_insn(env, ctx, ISA_MIPS32); in decode_opc()
[all …]
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| D | op_helper.c | 67 } else if (env->insn_flags & ISA_MIPS32) { in compute_hflags()
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| /external/llvm/lib/Target/Mips/ |
| D | MicroMipsInstrInfo.td | 222 ISA_MIPS32;
224 ISA_MIPS32;
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| D | MipsInstrInfo.td | 234 class ISA_MIPS32 { list<Predicate> InsnPredicates = [HasMips32]; }
1150 def SYNC : MMRel, SYNC_FT<"sync">, SYNC_FM, ISA_MIPS32;
1177 def DERET : MMRel, ER_FT<"deret">, ER_FM<0x1f>, ISA_MIPS32;
1359 def MFC0 : MFC3OP<"mfc0", GPR32Opnd>, MFC3OP_FM<0x10, 0>, ISA_MIPS32;
1360 def MTC0 : MFC3OP<"mtc0", GPR32Opnd>, MFC3OP_FM<0x10, 4>, ISA_MIPS32;
1408 def JALR_HB : JALR_HB_DESC, JALR_HB_ENC, ISA_MIPS32;
1450 def : MipsInstAlias<"jalr.hb $rs", (JALR_HB RA, GPR32Opnd:$rs), 1>, ISA_MIPS32;
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| /external/qemu/disas/ |
| D | mips.c | 583 #define ISA_MIPS32 (ISA_MIPS2 | INSN_ISA32) macro
586 #define ISA_MIPS32R2 (ISA_MIPS32 | INSN_ISA32R2)
3179 ISA_MIPS32 | INSN_MIPS16 | INSN_SMARTMIPS,
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