Searched refs:LDC1 (Results 1 – 20 of 20) sorted by relevance
/external/llvm/test/CodeGen/Mips/ |
D | mno-ldc1-sdc1.ll | 3 ; RUN: FileCheck %s -check-prefix=ALL -check-prefix=32R1-LDC1 7 ; RUN: FileCheck %s -check-prefix=ALL -check-prefix=32R6-LDC1 106 ; 32R1-LDC1: ldc1 $f0, 0(${{[0-9]+}}) 110 ; 32R6-LDC1: ldc1 $f0, 0(${{[0-9]+}}) 171 ; 32R1-LDC1: sdc1 $f{{[0-9]+}}, 0(${{[0-9]+}}) 175 ; 32R6-LDC1: sdc1 $f{{[0-9]+}}, 0(${{[0-9]+}}) 206 ; 32R1-LDC1: ldc1 $f0, 0(${{[0-9]+}}) 211 ; 32R6-LDC1: ldc1 $f0, 0(${{[0-9]+}}) 237 ; 32R1-LDC1: sdc1 $f{{[0-9]+}}, 0(${{[0-9]+}}) 242 ; 32R6-LDC1: sdc1 $f{{[0-9]+}}, 0(${{[0-9]+}})
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/external/chromium_org/v8/src/mips/ |
D | constants-mips.cc | 324 case LDC1: in InstructionType()
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D | constants-mips.h | 358 LDC1 = ((6 << 3) + 5) << kOpcodeShift, enumerator
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D | disasm-mips.cc | 1211 case LDC1: in DecodeTypeImmediate()
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D | simulator-mips.cc | 2917 case LDC1: in DecodeTypeImmediate() 2991 case LDC1: in DecodeTypeImmediate()
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/external/chromium_org/v8/src/mips64/ |
D | constants-mips64.cc | 345 case LDC1: in InstructionType()
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D | constants-mips64.h | 332 LDC1 = ((6 << 3) + 5) << kOpcodeShift, enumerator
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D | disasm-mips64.cc | 1360 case LDC1: in DecodeTypeImmediate()
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D | simulator-mips64.cc | 3065 case LDC1: in DecodeTypeImmediate() 3147 case LDC1: in DecodeTypeImmediate()
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D | assembler-mips64.cc | 2212 GenInstrImmediate(LDC1, src.rm(), fd, src.offset_); in ldc1()
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/external/llvm/lib/Target/Mips/MCTargetDesc/ |
D | MipsNaClELFStreamer.cpp | 218 case Mips::LDC1: in isBasePlusOffsetMemoryAccess()
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/external/valgrind/main/none/tests/mips32/ |
D | vfp.stdout.exp-mips32-BE | 1 LDC1
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D | vfp.stdout.exp-mips32-LE | 1 LDC1
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D | vfp.stdout.exp-mips32r2-LE | 1 LDC1
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D | vfp.stdout.exp-mips32r2-BE | 1 LDC1
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/external/llvm/lib/Target/Mips/ |
D | MipsFastISel.cpp | 184 Opc = Mips::LDC1; in EmitLoad()
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D | MipsSEInstrInfo.cpp | 48 (Opc == Mips::LWC1) || (Opc == Mips::LDC1) || (Opc == Mips::LDC164)) { in isLoadFromStackSlot() 249 Opc = Mips::LDC1; in loadRegFromStack()
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D | MipsInstrFPU.td | 398 def LDC1 : MMRel, LW_FT<"ldc1", AFGR64Opnd, II_LDC1, load>, LW_FM<0x35>, 649 def : LoadRegImmPat<LDC1, f64, load>, FGR_32;
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/external/valgrind/main/none/tests/mips64/ |
D | fpu_load_store.stdout.exp-BE | 1 --- LDC1 ---
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D | fpu_load_store.stdout.exp-LE | 1 --- LDC1 ---
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