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Searched refs:MCSchedModel (Results 1 – 14 of 14) sorted by relevance

/external/llvm/lib/MC/
DMCSubtargetInfo.cpp20 MCSchedModel MCSchedModel::DefaultSchedModel; // For unknown processors.
36 CPUSchedModel = &MCSchedModel::DefaultSchedModel; in InitCPUSchedModel()
81 const MCSchedModel *
100 return &MCSchedModel::DefaultSchedModel; in getSchedModelForCPU()
103 return (const MCSchedModel *)Found->Value; in getSchedModelForCPU()
108 const MCSchedModel *SchedModel = getSchedModelForCPU(CPU); in getInstrItineraryForCPU()
/external/llvm/include/llvm/MC/
DMCSchedule.h136 class MCSchedModel {
138 static MCSchedModel DefaultSchedModel; // For unknown processors.
207 MCSchedModel(): IssueWidth(DefaultIssueWidth), in MCSchedModel() function
221 MCSchedModel(unsigned iw, int mbs, int lmbs, unsigned ll, unsigned hl, in MCSchedModel() function
DMCSubtargetInfo.h39 const MCSchedModel *CPUSchedModel;
85 const MCSchedModel *getSchedModelForCPU(StringRef CPU) const;
89 const MCSchedModel *getSchedModel() const { return CPUSchedModel; } in getSchedModel()
DMCInstrItineraries.h113 const MCSchedModel *SchedModel; ///< Basic machine properties.
121 InstrItineraryData() : SchedModel(&MCSchedModel::DefaultSchedModel), in InstrItineraryData()
125 InstrItineraryData(const MCSchedModel *SM, const InstrStage *S, in InstrItineraryData()
/external/llvm/include/llvm/CodeGen/
DTargetSchedule.h35 MCSchedModel SchedModel;
51 void init(const MCSchedModel &sm, const TargetSubtargetInfo *sti,
67 const MCSchedModel *getMCSchedModel() const { return &SchedModel; } in getMCSchedModel()
/external/llvm/include/llvm/Target/
DTargetInstrInfo.h31 class MCSchedModel; variable
874 unsigned defaultDefLatency(const MCSchedModel *SchedModel,
DTargetSchedule.td69 // properties are defined in MCSchedModel. A value of "-1" in the
/external/llvm/lib/Target/ARM/
DARMSubtarget.h228 const MCSchedModel *SchedModel;
/external/llvm/lib/CodeGen/
DTargetSchedule.cpp54 void TargetSchedModel::init(const MCSchedModel &sm, in init()
DEarlyIfConversion.cpp583 const MCSchedModel *SchedModel;
DTargetInstrInfo.cpp749 unsigned TargetInstrInfo::defaultDefLatency(const MCSchedModel *SchedModel, in defaultDefLatency()
/external/llvm/lib/MC/MCDisassembler/
DDisassembler.cpp205 const MCSchedModel *SCModel = STI->getSchedModel(); in getLatency()
/external/llvm/lib/Target/AArch64/
DAArch64ConditionalCompares.cpp726 const MCSchedModel *SchedModel;
DAArch64SchedA53.td16 // This works with MachineScheduler. See MCSchedModel.h for details.