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Searched refs:MRM2m (Results 1 – 16 of 16) sorted by relevance

/external/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h300 MRM0m = 24, MRM1m = 25, MRM2m = 26, MRM3m = 27, // Format /0 /1 /2 /3 enumerator
687 case X86II::MRM2m: case X86II::MRM3m: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp824 case X86II::MRM2m: case X86II::MRM3m: in EmitVEXOpcodePrefix()
1068 case X86II::MRM2m: case X86II::MRM3m: in DetermineREXPrefix()
1443 case X86II::MRM2m: case X86II::MRM3m: in EncodeInstruction()
/external/llvm/lib/Target/X86/
DX86InstrShiftRotate.td412 def RCL8m1 : I<0xD0, MRM2m, (outs), (ins i8mem:$dst),
414 def RCL8mi : Ii8<0xC0, MRM2m, (outs), (ins i8mem:$dst, i8imm:$cnt),
416 def RCL16m1 : I<0xD1, MRM2m, (outs), (ins i16mem:$dst),
418 def RCL16mi : Ii8<0xC1, MRM2m, (outs), (ins i16mem:$dst, i8imm:$cnt),
420 def RCL32m1 : I<0xD1, MRM2m, (outs), (ins i32mem:$dst),
422 def RCL32mi : Ii8<0xC1, MRM2m, (outs), (ins i32mem:$dst, i8imm:$cnt),
424 def RCL64m1 : RI<0xD1, MRM2m, (outs), (ins i64mem:$dst),
426 def RCL64mi : RIi8<0xC1, MRM2m, (outs), (ins i64mem:$dst, i8imm:$cnt),
447 def RCL8mCL : I<0xD2, MRM2m, (outs), (ins i8mem:$dst),
449 def RCL16mCL : I<0xD3, MRM2m, (outs), (ins i16mem:$dst),
[all …]
DX86InstrFPStack.td298 def FCOM32m : FPI<0xD8, MRM2m, (outs), (ins f32mem:$src), "fcom{s}\t$src">;
304 def FICOM32m : FPI<0xDA, MRM2m, (outs), (ins i32mem:$src), "ficom{l}\t$src">;
307 def FCOM64m : FPI<0xDC, MRM2m, (outs), (ins f64mem:$src), "fcom{l}\t$src">;
314 def FICOM16m : FPI<0xDE, MRM2m, (outs), (ins i16mem:$src), "ficom{s}\t$src">;
457 def ST_F32m : FPI<0xD9, MRM2m, (outs), (ins f32mem:$dst), "fst{s}\t$dst",
459 def ST_F64m : FPI<0xDD, MRM2m, (outs), (ins f64mem:$dst), "fst{l}\t$dst",
467 def IST_F16m : FPI<0xDF, MRM2m, (outs), (ins i16mem:$dst), "fist{s}\t$dst",
469 def IST_F32m : FPI<0xDB, MRM2m, (outs), (ins i32mem:$dst), "fist{l}\t$dst",
DX86InstrControl.td196 def CALL16m : I<0xFF, MRM2m, (outs), (ins i16mem:$dst),
204 def CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst),
274 def CALL64m : I<0xFF, MRM2m, (outs), (ins i64mem:$dst),
DX86InstrSystem.td419 def LGDT16m : I<0x01, MRM2m, (outs), (ins opaque48mem:$src),
421 def LGDT32m : I<0x01, MRM2m, (outs), (ins opaque48mem:$src),
423 def LGDT64m : I<0x01, MRM2m, (outs), (ins opaque80mem:$src),
433 def LLDT16m : I<0x00, MRM2m, (outs), (ins i16mem:$src),
DX86CodeEmitter.cpp218 case X86II::MRM2m: case X86II::MRM3m: in determineREX()
903 case X86II::MRM2m: case X86II::MRM3m: in emitVEXOpcodePrefix()
1343 case X86II::MRM2m: case X86II::MRM3m: in emitInstruction()
DX86InstrArithmetic.td435 def NOT8m : I<0xF6, MRM2m, (outs), (ins i8mem :$dst),
438 def NOT16m : I<0xF7, MRM2m, (outs), (ins i16mem:$dst),
442 def NOT32m : I<0xF7, MRM2m, (outs), (ins i32mem:$dst),
446 def NOT64m : RI<0xF7, MRM2m, (outs), (ins i64mem:$dst), "not{q}\t$dst",
1238 defm ADC : ArithBinOp_RFF<0x10, 0x12, 0x14, "adc", MRM2r, MRM2m, X86adc_flag,
DX86InstrAVX512.td2557 defm VPSRLDZ : avx512_shift_rmi<0x72, MRM2r, MRM2m, "vpsrld", X86vsrli,
2564 defm VPSRLQZ : avx512_shift_rmi<0x73, MRM2r, MRM2m, "vpsrlq", X86vsrli,
4230 defm VGATHERPF1DPS: avx512_gather_scatter_prefetch<0xC6, MRM2m, "vgatherpf1dps",
4233 defm VGATHERPF1QPS: avx512_gather_scatter_prefetch<0xC7, MRM2m, "vgatherpf1qps",
4236 defm VGATHERPF1DPD: avx512_gather_scatter_prefetch<0xC6, MRM2m, "vgatherpf1dpd",
4239 defm VGATHERPF1QPD: avx512_gather_scatter_prefetch<0xC7, MRM2m, "vgatherpf1qpd",
DX86InstrFormats.td33 def MRM0m : Format<24>; def MRM1m : Format<25>; def MRM2m : Format<26>;
DX86InstrInfo.td2075 defm BLSMSK32 : bmi_bls<"blsmsk{l}", MRM2r, MRM2m, GR32, i32mem>;
2076 defm BLSMSK64 : bmi_bls<"blsmsk{q}", MRM2r, MRM2m, GR64, i64mem>, VEX_W;
2294 defm BLSFILL : tbm_binary_intr<0x01, "blsfill", MRM2r, MRM2m>;
DX86InstrSSE.td3769 def PREFETCHT1 : I<0x18, MRM2m, (outs), (ins i8mem:$src),
3817 def VLDMXCSR : VPSI<0xAE, MRM2m, (outs), (ins i32mem:$src),
3824 def LDMXCSR : PSI<0xAE, MRM2m, (outs), (ins i32mem:$src),
/external/llvm/utils/TableGen/
DX86RecognizableInstr.cpp97 MRM0m = 24, MRM1m = 25, MRM2m = 26, MRM3m = 27, enumerator
709 case X86Local::MRM2m: in emitInstructionSpecifier()
830 case X86Local::MRM2m: case X86Local::MRM3m: in emitDecodePath()
/external/llvm/test/TableGen/
DTargetInstrInfo.td55 def MRM0m : Format<24>; def MRM1m : Format<25>; def MRM2m : Format<26>;
/external/llvm/docs/TableGen/
DLangIntro.rst543 def CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst, variable_ops),
/external/llvm/docs/
DWritingAnLLVMBackend.rst1827 case X86II::MRM2m: case X86II::MRM3m: // a MEMORY r/m operand and