| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86BaseInfo.h | 301 MRM4m = 28, MRM5m = 29, MRM6m = 30, MRM7m = 31, // Format /4 /5 /6 /7 enumerator
689 case X86II::MRM6m: case X86II::MRM7m: { in getMemoryOperandNo()
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| D | X86MCCodeEmitter.cpp | 826 case X86II::MRM6m: case X86II::MRM7m: { in EmitVEXOpcodePrefix()
1070 case X86II::MRM6m: case X86II::MRM7m: in DetermineREXPrefix()
1445 case X86II::MRM6m: case X86II::MRM7m: { in EncodeInstruction()
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrShiftRotate.td | 284 def SAR8mCL : I<0xD2, MRM7m, (outs), (ins i8mem :$dst),
288 def SAR16mCL : I<0xD3, MRM7m, (outs), (ins i16mem:$dst),
292 def SAR32mCL : I<0xD3, MRM7m, (outs), (ins i32mem:$dst),
296 def SAR64mCL : RI<0xD3, MRM7m, (outs), (ins i64mem:$dst),
301 def SAR8mi : Ii8<0xC0, MRM7m, (outs), (ins i8mem :$dst, i8imm:$src),
305 def SAR16mi : Ii8<0xC1, MRM7m, (outs), (ins i16mem:$dst, i8imm:$src),
309 def SAR32mi : Ii8<0xC1, MRM7m, (outs), (ins i32mem:$dst, i8imm:$src),
313 def SAR64mi : RIi8<0xC1, MRM7m, (outs), (ins i64mem:$dst, i8imm:$src),
319 def SAR8m1 : I<0xD0, MRM7m, (outs), (ins i8mem :$dst),
323 def SAR16m1 : I<0xD1, MRM7m, (outs), (ins i16mem:$dst),
[all …]
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| D | X86InstrVMX.td | 44 def VMPTRSTm : I<0xC7, MRM7m, (outs i64mem:$vmcs), (ins),
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| D | X86InstrFPStack.td | 226 defm DIVR: FPBinary<fdiv, MRM7m, "divr">;
312 def FNSTSWm : FPI<0xDD, MRM7m, (outs f32mem:$dst), (ins), "fnstsw\t$dst">;
465 def ST_FP80m : FPI<0xDB, MRM7m, (outs), (ins f80mem:$dst), "fstp{t}\t$dst",
475 def IST_FP64m : FPI<0xDF, MRM7m, (outs), (ins i64mem:$dst), "fistp{ll}\t$dst",
592 def FNSTCW16m : I<0xD9, MRM7m, // [mem16] = X87 control world
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| D | X86CodeEmitter.cpp | 220 case X86II::MRM6m: case X86II::MRM7m: in determineREX()
905 case X86II::MRM6m: case X86II::MRM7m: { in emitVEXOpcodePrefix()
1345 case X86II::MRM6m: case X86II::MRM7m: { in emitInstruction()
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| D | X86InstrArithmetic.td | 351 def IDIV8m : I<0xF6, MRM7m, (outs), (ins i8mem:$src), // AX/[mem8] = AL,AH
355 def IDIV16m: I<0xF7, MRM7m, (outs), (ins i16mem:$src), // DX:AX/[mem16] = AX,DX
359 def IDIV32m: I<0xF7, MRM7m, (outs), (ins i32mem:$src),
363 def IDIV64m: RI<0xF7, MRM7m, (outs), (ins i64mem:$src),
1244 defm CMP : ArithBinOp_F<0x38, 0x3A, 0x3C, "cmp", MRM7r, MRM7m, X86cmp, 0, 0>;
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| D | X86InstrSystem.td | 247 def INVLPG : I<0x01, MRM7m, (outs), (ins i8mem:$addr), "invlpg\t$addr",
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| D | X86InstrInfo.td | 1519 def BTC16mi8 : Ii8<0xBA, MRM7m, (outs), (ins i16mem:$src1, i16i8imm:$src2),
1522 def BTC32mi8 : Ii8<0xBA, MRM7m, (outs), (ins i32mem:$src1, i32i8imm:$src2),
1525 def BTC64mi8 : RIi8<0xBA, MRM7m, (outs), (ins i64mem:$src1, i64i8imm:$src2),
2296 defm T1MSKC : tbm_binary_intr<0x01, "t1mskc", MRM7r, MRM7m>;
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| D | X86InstrFormats.td | 35 def MRM6m : Format<30>; def MRM7m : Format<31>;
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| D | X86InstrSSE.td | 3783 def CLFLUSH : I<0xAE, MRM7m, (outs), (ins i8mem:$src),
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| /external/llvm/utils/TableGen/ |
| D | X86RecognizableInstr.cpp | 98 MRM4m = 28, MRM5m = 29, MRM6m = 30, MRM7m = 31, enumerator
714 case X86Local::MRM7m: in emitInstructionSpecifier()
832 case X86Local::MRM6m: case X86Local::MRM7m: in emitDecodePath()
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| /external/llvm/test/TableGen/ |
| D | TargetInstrInfo.td | 57 def MRM6m : Format<30>; def MRM7m : Format<31>;
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| /external/llvm/docs/ |
| D | WritingAnLLVMBackend.rst | 1829 case X86II::MRM6m: case X86II::MRM7m: // to hold extended opcode data
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