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Searched refs:MSR_MTRRphysMask (Results 1 – 2 of 2) sorted by relevance

/external/qemu/target-i386/
Dmisc_helper.c335 case MSR_MTRRphysMask(0): in helper_wrmsr()
336 case MSR_MTRRphysMask(1): in helper_wrmsr()
337 case MSR_MTRRphysMask(2): in helper_wrmsr()
338 case MSR_MTRRphysMask(3): in helper_wrmsr()
339 case MSR_MTRRphysMask(4): in helper_wrmsr()
340 case MSR_MTRRphysMask(5): in helper_wrmsr()
341 case MSR_MTRRphysMask(6): in helper_wrmsr()
342 case MSR_MTRRphysMask(7): in helper_wrmsr()
343 env->mtrr_var[((uint32_t)ECX - MSR_MTRRphysMask(0)) / 2].mask = val; in helper_wrmsr()
454 case MSR_MTRRphysMask(0): in helper_rdmsr()
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Dcpu.h333 #define MSR_MTRRphysMask(reg) (0x200 + 2 * (reg) + 1) macro