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Searched refs:MipsSubtarget (Results 1 – 25 of 40) sorted by relevance

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/external/llvm/lib/Target/Mips/
DMipsFrameLowering.h21 class MipsSubtarget; variable
25 const MipsSubtarget &STI;
28 explicit MipsFrameLowering(const MipsSubtarget &sti, unsigned Alignment) in MipsFrameLowering()
32 const MipsSubtarget &ST);
41 const MipsFrameLowering *createMips16FrameLowering(const MipsSubtarget &ST);
42 const MipsFrameLowering *createMipsSEFrameLowering(const MipsSubtarget &ST);
DMipsSubtarget.cpp73 void MipsSubtarget::anchor() { } in anchor()
75 static std::string computeDataLayout(const MipsSubtarget &ST) { in computeDataLayout()
105 MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU, in MipsSubtarget() function in MipsSubtarget
180 MipsSubtarget::enablePostRAScheduler(CodeGenOpt::Level OptLevel, in enablePostRAScheduler()
190 MipsSubtarget &
191 MipsSubtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS, in initializeSubtargetDependencies()
217 void MipsSubtarget::resetSubtarget(MachineFunction *MF) { in resetSubtarget()
257 void MipsSubtarget::setHelperClassesMips16() { in setHelperClassesMips16()
275 void MipsSubtarget::setHelperClassesMipsSE() { in setHelperClassesMipsSE()
293 bool MipsSubtarget::mipsSEUsesSoftFloat() const { in mipsSEUsesSoftFloat()
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DMipsMachineFunction.cpp81 const MipsSubtarget &ST = MF.getTarget().getSubtarget<MipsSubtarget>(); in getGlobalBaseReg()
108 const MipsSubtarget &ST = MF.getTarget().getSubtarget<MipsSubtarget>(); in createEhDataRegsFI()
DMipsRegisterInfo.h24 class MipsSubtarget; variable
29 const MipsSubtarget &Subtarget;
32 MipsRegisterInfo(const MipsSubtarget &Subtarget);
DMipsLongBranch.cpp67 ABI(TM.getSubtarget<MipsSubtarget>().getTargetABI()), in MipsLongBranch()
68 LongBranchSeqSize(!IsPIC ? 2 : (ABI == MipsSubtarget::N64 ? 10 : in MipsLongBranch()
69 (!TM.getSubtarget<MipsSubtarget>().isTargetNaCl() ? 9 : 10))) {} in MipsLongBranch()
273 const MipsSubtarget &Subtarget = TM.getSubtarget<MipsSubtarget>(); in expandToLongBranch()
276 if (ABI != MipsSubtarget::N64) { in expandToLongBranch()
330 if (!TM.getSubtarget<MipsSubtarget>().isTargetNaCl()) { in expandToLongBranch()
452 if (TM.getSubtarget<MipsSubtarget>().inMips16Mode()) in runOnMachineFunction()
455 TM.getSubtarget<MipsSubtarget>().isABI_O32() && in runOnMachineFunction()
477 int ShVal = TM.getSubtarget<MipsSubtarget>().inMicroMipsMode() ? 2 : 4; in runOnMachineFunction()
480 if (TM.getSubtarget<MipsSubtarget>().isTargetNaCl()) { in runOnMachineFunction()
DMipsModuleISelDAGToDAG.h41 TM(TM_), Subtarget(TM.getSubtarget<MipsSubtarget>()) {} in MipsModuleDAGToDAGISel()
54 const MipsSubtarget &Subtarget;
DMips16HardFloat.h34 TM(TM_), Subtarget(TM.getSubtarget<MipsSubtarget>()) { in Mips16HardFloat()
47 const MipsSubtarget &Subtarget;
DMipsSEInstrInfo.cpp31 IsN64(tm.getSubtarget<MipsSubtarget>().isABI_N64()) {} in MipsSEInstrInfo()
87 bool isMicroMips = TM.getSubtarget<MipsSubtarget>().inMicroMipsMode(); in copyPhysReg()
268 bool isMicroMips = TM.getSubtarget<MipsSubtarget>().inMicroMipsMode(); in expandPostRAPseudo()
363 const MipsSubtarget &STI = TM.getSubtarget<MipsSubtarget>(); in adjustStackPtr()
383 const MipsSubtarget &STI = TM.getSubtarget<MipsSubtarget>(); in loadImmediate()
432 const auto &Subtarget = TM.getSubtarget<MipsSubtarget>(); in expandRetRA()
550 bool HasMTHC1 = TM.getSubtarget<MipsSubtarget>().hasMips32r2() || in expandBuildPairF64()
551 TM.getSubtarget<MipsSubtarget>().hasMips32r6(); in expandBuildPairF64()
570 assert(TM.getSubtarget<MipsSubtarget>().hasMips32r2() && in expandBuildPairF64()
597 const MipsSubtarget &STI = TM.getSubtarget<MipsSubtarget>(); in expandEhReturn()
DMipsTargetMachine.cpp98 const MipsSubtarget &getMipsSubtarget() const { in getMipsSubtarget()
169 const MipsSubtarget &Subtarget = TM.getSubtarget<MipsSubtarget>(); in addPreEmitPass()
DMipsTargetObjectFile.cpp63 const MipsSubtarget &Subtarget = TM.getSubtarget<MipsSubtarget>(); in IsGlobalInSmallSection()
DMipsSubtarget.h36 class MipsSubtarget : public MipsGenSubtargetInfo {
177 MipsSubtarget(const std::string &TT, const std::string &CPU,
278 MipsSubtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS,
DMipsTargetMachine.h28 MipsSubtarget Subtarget;
45 const MipsSubtarget *getSubtargetImpl() const override { return &Subtarget; } in getSubtargetImpl()
DMipsISelDAGToDAG.h35 : SelectionDAGISel(TM), Subtarget(&TM.getSubtarget<MipsSubtarget>()) {} in MipsDAGToDAGISel()
49 const MipsSubtarget *Subtarget;
DMipsAsmPrinter.h88 const MipsSubtarget *Subtarget;
95 Subtarget = &TM.getSubtarget<MipsSubtarget>(); in MipsAsmPrinter()
DMipsModuleISelDAGToDAG.cpp23 const_cast<MipsSubtarget&>(Subtarget).resetSubtarget(&MF); in runOnMachineFunction()
DMipsSERegisterInfo.h25 MipsSERegisterInfo(const MipsSubtarget &Subtarget);
DMips16RegisterInfo.h24 Mips16RegisterInfo(const MipsSubtarget &Subtarget);
DMipsSEFrameLowering.h23 explicit MipsSEFrameLowering(const MipsSubtarget &STI);
DMips16FrameLowering.cpp32 Mips16FrameLowering::Mips16FrameLowering(const MipsSubtarget &STI) in Mips16FrameLowering()
188 llvm::createMips16FrameLowering(const MipsSubtarget &ST) { in createMips16FrameLowering()
DMips16FrameLowering.h22 explicit Mips16FrameLowering(const MipsSubtarget &STI);
DMipsFrameLowering.cpp86 const MipsSubtarget &ST) { in create()
DAndroid.mk47 MipsSubtarget.cpp \
DMips16HardFloat.cpp250 const MipsSubtarget &Subtarget) { in assureFPCallStub()
366 (Function &F, Module *M, const MipsSubtarget &Subtarget) { in fixupFPReturnAndCall()
442 const MipsSubtarget &Subtarget ) { in createFPFnStub()
DCMakeLists.txt48 MipsSubtarget.cpp
DMips16RegisterInfo.cpp44 Mips16RegisterInfo::Mips16RegisterInfo(const MipsSubtarget &ST) in Mips16RegisterInfo()

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