Searched refs:NB_MMU_MODES (Results 1 – 9 of 9) sorted by relevance
57 #if (NB_MMU_MODES >= 3)76 #if (NB_MMU_MODES >= 4)95 #if (NB_MMU_MODES >= 5)114 #if (NB_MMU_MODES >= 6)133 #if (NB_MMU_MODES > 6)138 #define ACCESS_TYPE (NB_MMU_MODES)
50 #if ACCESS_TYPE < (NB_MMU_MODES)55 #elif ACCESS_TYPE == (NB_MMU_MODES)60 #elif ACCESS_TYPE == (NB_MMU_MODES + 1)75 #if ACCESS_TYPE == (NB_MMU_MODES + 1)127 #if ACCESS_TYPE != (NB_MMU_MODES + 1)153 #if ACCESS_TYPE != (NB_MMU_MODES + 1)
110 CPUTLBEntry tlb_table[NB_MMU_MODES][CPU_TLB_SIZE]; \111 hwaddr iotlb[NB_MMU_MODES][CPU_TLB_SIZE]; \
369 #define ACCESS_TYPE (NB_MMU_MODES + 1)
61 for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) { in tlb_flush()109 for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) { in tlb_flush_page()168 for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) { in tlb_set_dirty()
562 for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) { in cpu_physical_memory_reset_dirty()616 for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) { in cpu_tlb_update_dirty()
114 #define NB_MMU_MODES 3 macro
86 #define NB_MMU_MODES 2 macro
734 #define NB_MMU_MODES 2 macro