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Searched refs:Narrow (Results 1 – 16 of 16) sorted by relevance

/external/skia/src/sfnt/
DSkPanose.h577 ((Narrow, 8))
593 ((Narrow, 8))
609 ((Narrow, 8))
625 ((Narrow, 8))
/external/chromium_org/third_party/skia/src/sfnt/
DSkPanose.h577 ((Narrow, 8))
593 ((Narrow, 8))
609 ((Narrow, 8))
625 ((Narrow, 8))
/external/chromium_org/chrome/browser/ui/cocoa/location_bar/
Dselected_keyword_decoration_unittest.mm53 // Narrow width chooses the partial string.
59 // Narrow doesn't choose partial string if there is not one.
/external/chromium_org/v8/src/compiler/
Dtyper.h24 void Narrow(Graph* graph, Node* node, MaybeHandle<Context> context);
Dtyper.cc207 void Typer::Narrow(Graph* graph, Node* start, MaybeHandle<Context> context) { in Narrow() function in v8::internal::compiler::Typer
/external/llvm/lib/Target/AArch64/
DAArch64ISelDAGToDAG.cpp1128 bool Narrow = VT.getSizeInBits() == 64; in SelectLoadLane() local
1133 if (Narrow) in SelectLoadLane()
1159 if (Narrow) in SelectLoadLane()
1173 bool Narrow = VT.getSizeInBits() == 64; in SelectPostLoadLane() local
1178 if (Narrow) in SelectPostLoadLane()
1207 Narrow ? NarrowVector(SuperReg, *CurDAG) : SuperReg); in SelectPostLoadLane()
1215 if (Narrow) in SelectPostLoadLane()
1231 bool Narrow = VT.getSizeInBits() == 64; in SelectStoreLane() local
1236 if (Narrow) in SelectStoreLane()
1264 bool Narrow = VT.getSizeInBits() == 64; in SelectPostStoreLane() local
[all …]
/external/llvm/test/CodeGen/Thumb2/
Dv8_IT_6.ll3 ; Narrow tORR cannot be predicated and set CPSR at the same time!
/external/llvm/include/llvm/IR/
DIntrinsicsAArch64.td340 // Vector Saturating Narrow
346 // Vector Saturating Extract and Unsigned Narrow
/external/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt1427 # Narrow
1784 # Scalar Signed Saturating Extract Unsigned Narrow
1794 # Scalar Signed Saturating Extract Signed Narrow
1804 # Scalar Unsigned Saturating Extract Narrow
1916 # Signed Saturating Shift Right Narrow (Immediate)
1926 # Unsigned Saturating Shift Right Narrow (Immediate)
1936 # Signed Saturating Rounded Shift Right Narrow (Immediate)
1946 # Unsigned Saturating Rounded Shift Right Narrow (Immediate)
1956 # Signed Saturating Shift Right Unsigned Narrow (Immediate)
1966 # Signed Saturating Rounded Shift Right Unsigned Narrow (Immediate)
[all …]
/external/clang/include/clang/Basic/
Darm_neon.td1325 // Signed/Unsigned Saturating Shift Right Narrow (Immediate)
1327 // Signed/Unsigned Saturating Rounded Shift Right Narrow (Immediate)
1329 // Signed Saturating Shift Right Unsigned Narrow (Immediate)
1331 // Signed Saturating Rounded Shift Right Unsigned Narrow (Immediate)
1509 // Scalar Signed Saturating Extract Unsigned Narrow
1513 // Scalar Signed Saturating Extract Narrow
1517 // Scalar Unsigned Saturating Extract Narrow
/external/llvm/lib/Target/ARM/
DARMInstrNEON.td2488 // Narrow 2-register operations.
2497 // Narrow 2-register intrinsics.
3141 // Narrow shift by immediate.
4054 // Neon Shift Narrow operations,
4118 // VADDHN : Vector Add and Narrow Returning High Half (D = Q + Q)
4120 // VRADDHN : Vector Rounding Add and Narrow Returning High Half (D = Q + Q)
4462 // VSUBHN : Vector Subtract and Narrow Returning High Half (D = Q - Q)
4464 // VRSUBHN : Vector Rounding Subtract and Narrow Returning High Half (D=Q-Q)
5078 // VSHRN : Vector Shift Right and Narrow
5103 // VRSHRN : Vector Rounding Shift Right and Narrow
[all …]
DARMScheduleSwift.td1591 // 4.2.31 Advanced SIMD, Add and Shift with Narrow
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp20481 SDValue Narrow = N->getOperand(0); in WidenMaskArithmetic() local
20482 EVT NarrowVT = Narrow->getValueType(0); in WidenMaskArithmetic()
20486 if (Narrow->getOpcode() != ISD::XOR && in WidenMaskArithmetic()
20487 Narrow->getOpcode() != ISD::AND && in WidenMaskArithmetic()
20488 Narrow->getOpcode() != ISD::OR) in WidenMaskArithmetic()
20491 SDValue N0 = Narrow->getOperand(0); in WidenMaskArithmetic()
20492 SDValue N1 = Narrow->getOperand(1); in WidenMaskArithmetic()
20493 SDLoc DL(Narrow); in WidenMaskArithmetic()
20514 if (!TLI.isOperationLegalOrPromote(Narrow->getOpcode(), WideVT)) in WidenMaskArithmetic()
20529 SDValue Op = DAG.getNode(Narrow->getOpcode(), DL, WideVT, N0, N1); in WidenMaskArithmetic()
/external/pcre/dist/doc/
Dpcre.txt5236 U+202F Narrow no-break space
/external/icu/icu4c/source/data/unidata/
Dppucd.txt443 value;dt;Nar;Narrow;nar
456 value;ea;Na;Narrow
/external/chromium_org/third_party/icu/source/data/unidata/
Dppucd.txt442 value;dt;Nar;Narrow;nar
455 value;ea;Na;Narrow