| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| D | AMDGPUInstrInfo.cpp | 188 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear() argument
190 assert(Offset2 > Offset1 in shouldScheduleLoadsNear()
195 return (NumLoads < 16 && (Offset2 - Offset1) < 16); in shouldScheduleLoadsNear()
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| D | AMDGPUInstrInfo.h | 110 int64_t Offset1, int64_t Offset2,
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDGPUInstrInfo.cpp | 188 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear() argument
190 assert(Offset2 > Offset1 in shouldScheduleLoadsNear()
195 return (NumLoads < 16 && (Offset2 - Offset1) < 16); in shouldScheduleLoadsNear()
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| D | AMDGPUInstrInfo.h | 110 int64_t Offset1, int64_t Offset2,
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| /external/bluetooth/bluedroid/embdrv/sbc/encoder/srce/ |
| D | sbc_analysis.c | 914 SINT32 Offset,Offset2,ChOffset; in SbcAnalysisFilter4() local
939 Offset2=(SINT32)(EncMaxShiftCounter+40); in SbcAnalysisFilter4()
954 s16X[Offset2+3+Offset] = *ps16PcmBuf; ps16PcmBuf++; in SbcAnalysisFilter4()
956 s16X[Offset2+2+Offset] = *ps16PcmBuf; ps16PcmBuf++; in SbcAnalysisFilter4()
958 s16X[Offset2+1+Offset] = *ps16PcmBuf; ps16PcmBuf++; in SbcAnalysisFilter4()
960 s16X[Offset2+0+Offset] = *ps16PcmBuf; ps16PcmBuf++; in SbcAnalysisFilter4()
964 ChOffset=s32Ch*Offset2+Offset; in SbcAnalysisFilter4()
1005 SINT32 Offset,Offset2; in SbcAnalysisFilter8() local
1031 Offset2=(SINT32)(EncMaxShiftCounter+80); in SbcAnalysisFilter8()
1050 s16X[Offset2+7+Offset] = *ps16PcmBuf; ps16PcmBuf++; in SbcAnalysisFilter8()
[all …]
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| /external/llvm/lib/Target/R600/ |
| D | AMDGPUInstrInfo.cpp | 219 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear() argument
221 assert(Offset2 > Offset1 in shouldScheduleLoadsNear()
226 return (NumLoads < 16 && (Offset2 - Offset1) < 16); in shouldScheduleLoadsNear()
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| D | AMDGPUInstrInfo.h | 124 int64_t Offset1, int64_t Offset2,
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | ScheduleDAGSDNodes.cpp | 231 int64_t Offset1, Offset2; in ClusterNeighboringLoads() local
232 if (!TII->areLoadsFromSameBasePtr(Base, User, Offset1, Offset2) || in ClusterNeighboringLoads()
233 Offset1 == Offset2) in ClusterNeighboringLoads()
239 O2SMap.insert(std::make_pair(Offset2, User)); in ClusterNeighboringLoads()
240 Offsets.push_back(Offset2); in ClusterNeighboringLoads()
241 if (Offset2 < Offset1) in ClusterNeighboringLoads()
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| D | DAGCombiner.cpp | 11499 int64_t Offset1, Offset2; in isAlias() local
11505 Base2, Offset2, GV2, CV2); in isAlias()
11509 return !((Offset1 + (Op0->getMemoryVT().getSizeInBits() >> 3)) <= Offset2 || in isAlias()
11510 (Offset2 + (Op1->getMemoryVT().getSizeInBits() >> 3)) <= Offset1); in isAlias()
11519 Offset2 += MFI->getObjectOffset(cast<FrameIndexSDNode>(Base2)->getIndex()); in isAlias()
11520 return !((Offset1 + (Op0->getMemoryVT().getSizeInBits() >> 3)) <= Offset2 || in isAlias()
11521 (Offset2 + (Op1->getMemoryVT().getSizeInBits() >> 3)) <= Offset1); in isAlias()
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| D | SelectionDAG.cpp | 6509 int64_t Offset2 = 0; in isConsecutiveLoad() local
6512 bool isGA2 = TLI->isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); in isConsecutiveLoad()
6514 return Offset1 == (Offset2 + Dist*Bytes); in isConsecutiveLoad()
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrInfo.h | 346 int64_t &Offset2) const override;
357 int64_t Offset1, int64_t Offset2,
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| D | X86InstrInfo.cpp | 4831 int64_t &Offset1, int64_t &Offset2) const { in areLoadsFromSameBasePtr()
4928 Offset2 = cast<ConstantSDNode>(Load2->getOperand(3))->getSExtValue(); in areLoadsFromSameBasePtr()
4936 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear() argument
4938 assert(Offset2 > Offset1); in shouldScheduleLoadsNear()
4939 if ((Offset2 - Offset1) / 8 > 64) in shouldScheduleLoadsNear()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 149 int64_t &Offset2) const override;
160 int64_t Offset1, int64_t Offset2,
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| D | ARMBaseInstrInfo.cpp | 1430 int64_t &Offset2) const { in areLoadsFromSameBasePtr()
1491 Offset2 = cast<ConstantSDNode>(Load2->getOperand(1))->getSExtValue(); in areLoadsFromSameBasePtr()
1510 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear() argument
1515 assert(Offset2 > Offset1); in shouldScheduleLoadsNear()
1517 if ((Offset2 - Offset1) / 8 > 64) in shouldScheduleLoadsNear()
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| /external/llvm/include/llvm/Target/ |
| D | TargetInstrInfo.h | 635 int64_t &Offset1, int64_t &Offset2) const { in areLoadsFromSameBasePtr() argument
648 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear() argument
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.cpp | 1124 int64_t Offset2 = (MCID.TSFlags & SystemZII::Is128Bit ? Offset + 8 : Offset); in getOpcodeForOffset() local
1125 if (isUInt<12>(Offset) && isUInt<12>(Offset2)) { in getOpcodeForOffset()
1135 if (isInt<20>(Offset) && isInt<20>(Offset2)) { in getOpcodeForOffset()
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| /external/llvm/lib/Transforms/Scalar/ |
| D | MemCpyOptimizer.cpp | 118 int64_t Offset2 = GetOffsetFromIndex(GEP2, Idx, VariableIdxFound, TD); in IsPointerOffset() local
121 Offset = Offset2-Offset1; in IsPointerOffset()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrFormats.td | 8069 int Offset1, int Offset2, int Offset4, int Offset8> {
8095 !cast<Operand>("GPR64pi" # Offset2)>;
8098 !cast<Operand>("GPR64pi" # Offset2)>;
8114 defm : SIMDLdrAliases<asm, "4h", Count, Offset2, 64>;
8115 defm : SIMDLdrAliases<asm, "8h", Count, Offset2, 128>;
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 7301 int64_t Offset2 = 0; in isConsecutiveLS() local
7303 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); in isConsecutiveLS()
7305 return Offset1 == (Offset2 + Dist*Bytes); in isConsecutiveLS()
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